MIPS: build fix: sprinkle hardfloat into macros and embedded ASM

GCC before 4.9 haven't passed CFLAGS to the assembler properly,
in this case that flag is -msoft-float.
GCC 4.9 now passes all the CFLAGS to assembler as it should,
but that caused assembler errors in a lot of files:

"Error: opcode not supported on this processor"

This patch fixes it by explicitly setting the hardfloat
attribute in those files.

.set hardfloat

Squashed with bdf828255a2e [MIPS] Fix build issue with 4.9 GCC

Change-Id: I82bfcd4a0d677eebd0fd380e01f018d9bdbf3d34
Signed-off-by: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com>
Reviewed-on: https://mipsia.review.mips.com/2610
Reviewed-by: Raghu Gandham <raghu.gandham@imgtec.com>
Tested-by: Raghu Gandham <raghu.gandham@imgtec.com>

diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index 256289a1948a732371355a1364d6a71f17237d77..33bef7cd082d18e23c128bc42d741e91d546e778 100644 (file)
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -289,6 +289,29 @@ config MACH_LOONGSON1
          the ICT (Institute of Computing Technology) and the Chinese Academy
          of Sciences.
 
+config MIPS_GOLDFISH
+       bool "Goldfish (Virtual Platform)"
+       select BOOT_ELF32
+       select BOOT_RAW
+       select CEVT_R4K
+       select CSRC_R4K
+       select DMA_COHERENT
+       select IRQ_CPU
+       select MIPS_CPU_SCACHE
+       select SYS_HAS_CPU_MIPS32_R1
+       select SYS_HAS_CPU_MIPS32_R2
+       select SYS_HAS_CPU_MIPS32_R2_EVA
+       select SYS_HAS_CPU_MIPS32_R6
+       select SYS_HAS_EARLY_PRINTK
+       select SYS_SUPPORTS_32BIT_KERNEL
+       select SYS_SUPPORTS_64BIT_KERNEL
+       select SYS_HAS_CPU_MIPS64_R1
+       select SYS_HAS_CPU_MIPS64_R2
+       select SYS_HAS_CPU_MIPS64_R6
+       select SYS_SUPPORTS_BIG_ENDIAN
+       select SYS_SUPPORTS_LITTLE_ENDIAN
+       select USE_OF
+
 config MIPS_MALTA
        bool "MIPS Malta board"
        select ARCH_MAY_HAVE_PC_FDC

diff --git a/arch/mips/Makefile b/arch/mips/Makefile
index ce02de7222c3af87d72cae40f3057a41dc34af3c..3806bbface76454ac5c94a715b06653f7d392281 100644 (file)
--- a/arch/mips/Makefile
+++ b/arch/mips/Makefile
@@ -88,7 +88,7 @@ all-$(CONFIG_SYS_SUPPORTS_ZBOOT)+= vmlinuz
 # crossformat linking we rely on the elf2ecoff tool for format conversion.
 #
 cflags-y                       += -G 0 -mno-abicalls -fno-pic -pipe
-cflags-y                       += -msoft-float
+cflags-y                       += -msoft-float -Wa,-msoft-float
 LDFLAGS_vmlinux                        += -G 0 -static -n -nostdlib
 KBUILD_AFLAGS_MODULE           += -mlong-calls
 KBUILD_CFLAGS_MODULE           += -mlong-calls

diff --git a/arch/mips/include/asm/mipsregs.h b/arch/mips/include/asm/mipsregs.h
index ea5612ab5a60e71d0cb8fd3a2cea724bc6bcfdf5..e1df644aef9eff19558cf08a8b6efb1e92db933d 100644 (file)
--- a/arch/mips/include/asm/mipsregs.h
+++ b/arch/mips/include/asm/mipsregs.h
@@ -1280,6 +1280,7 @@ do {                                                                      \
        __asm__ __volatile__(                                           \
        "       .set    push                                    \n"     \
        "       .set    reorder                                 \n"     \
+       "       .set    hardfloat                               \n"     \
        "       # gas fails to assemble cfc1 for some archs,    \n"     \
        "       # like Octeon.                                  \n"     \
        "       .set    mips1                                   \n"     \
@@ -1294,6 +1295,7 @@ do {                                                                      \
        __asm__ __volatile__(                                           \
        "       .set    push                                    \n"     \
        "       .set    reorder                                 \n"     \
+       "       .set    hardfloat                               \n"     \
        "       # gas fails to assemble cfc1 for some archs,    \n"     \
        "       # like Octeon.                                  \n"     \
        "       .set    mips1                                   \n"     \

diff --git a/arch/mips/kernel/branch.c b/arch/mips/kernel/branch.c
index 5aee775157f01d46887b996e1f6d5f17e2e7888a..c6f59da5f5d280cf61b592bf95be56f60ef7d2d6 100644 (file)
--- a/arch/mips/kernel/branch.c
+++ b/arch/mips/kernel/branch.c
@@ -541,7 +541,7 @@ int __compute_return_epc_for_insn(struct pt_regs *regs,
 #endif
                preempt_disable();
                if (is_fpu_owner())
-                       asm volatile("cfc1\t%0,$31" : "=r" (fcr31));
+                       asm volatile(".set push\n.set hardfloat\ncfc1\t%0,$31\n.set pop" : "=r" (fcr31));
                else
                        fcr31 = current->thread.fpu.fcr31;
                preempt_enable();

diff --git a/arch/mips/kernel/genex.S b/arch/mips/kernel/genex.S
index 268ecf7ed0af58192242a193082654958f15d21c..2af678eb98c177cceab4f535d71cb4c5395368c8 100644 (file)
--- a/arch/mips/kernel/genex.S
+++ b/arch/mips/kernel/genex.S
@@ -424,6 +424,7 @@ NESTED(nmi_handler, PT_SIZE, sp)
        .set    push
        /* gas fails to assemble cfc1 for some archs (octeon).*/ \
        .set    mips1
+       .set    hardfloat
        cfc1    a1, fcr31
        li      a2, ~(0x3f << 12)
        and     a2, a1

diff --git a/arch/mips/kernel/ptrace.c b/arch/mips/kernel/ptrace.c
index 88edb0b3798e1ad83953c7cb202a47f073199fee..a7ef5a99cc9e0051f08e0a423d9d66d14f2ab63b 100644 (file)
--- a/arch/mips/kernel/ptrace.c
+++ b/arch/mips/kernel/ptrace.c
@@ -129,13 +129,13 @@ int ptrace_getfpregs(struct task_struct *child, __u32 __user *data)
                        unsigned int vpflags = dvpe();
                        flags = read_c0_status();
                        __enable_fpu();
-                       __asm__ __volatile__("cfc1\t%0,$0" : "=r" (tmp));
+                       __asm__ __volatile__(".set push\n.set hardfloat\ncfc1\t%0,$0\n.set pop" : "=r" (tmp));
                        write_c0_status(flags);
                        evpe(vpflags);
                } else {
                        flags = read_c0_status();
                        __enable_fpu();
-                       __asm__ __volatile__("cfc1\t%0,$0" : "=r" (tmp));
+                       __asm__ __volatile__(".set push\n.set hardfloat\ncfc1\t%0,$0\n.set pop" : "=r" (tmp));
                        write_c0_status(flags);
                }
        } else {
@@ -348,13 +348,13 @@ long arch_ptrace(struct task_struct *child, long request,
                                unsigned int vpflags = dvpe();
                                flags = read_c0_status();
                                __enable_fpu();
-                               __asm__ __volatile__("cfc1\t%0,$0": "=r" (tmp));
+                               __asm__ __volatile__(".set push\n.set hardfloat\ncfc1\t%0,$0\n.set pop": "=r" (tmp));
                                write_c0_status(flags);
                                evpe(vpflags);
                        } else {
                                flags = read_c0_status();
                                __enable_fpu();
-                               __asm__ __volatile__("cfc1\t%0,$0": "=r" (tmp));
+                               __asm__ __volatile__(".set push\n.set hardfloat\ncfc1\t%0,$0\n.set pop": "=r" (tmp));
                                write_c0_status(flags);
                        }
 #ifdef CONFIG_MIPS_MT_SMTC

diff --git a/arch/mips/kernel/ptrace32.c b/arch/mips/kernel/ptrace32.c
index 3f123c0c5aeac364b7d24cd65f6c07880967367b..a7488367117459eddb5084710f454528ad78af82 100644 (file)
--- a/arch/mips/kernel/ptrace32.c
+++ b/arch/mips/kernel/ptrace32.c
@@ -148,13 +148,13 @@ long compat_arch_ptrace(struct task_struct *child, compat_long_t request,
                                unsigned int vpflags = dvpe();
                                flags = read_c0_status();
                                __enable_fpu();
-                               __asm__ __volatile__("cfc1\t%0,$0": "=r" (tmp));
+                               __asm__ __volatile__(".set push\n.set hardfloat\ncfc1\t%0,$0\n.set pop": "=r" (tmp));
                                write_c0_status(flags);
                                evpe(vpflags);
                        } else {
                                flags = read_c0_status();
                                __enable_fpu();
-                               __asm__ __volatile__("cfc1\t%0,$0": "=r" (tmp));
+                               __asm__ __volatile__(".set push\n.set hardfloat\ncfc1\t%0,$0\n.set pop": "=r" (tmp));
                                write_c0_status(flags);
                        }
 #ifdef CONFIG_MIPS_MT_SMTC

diff --git a/arch/mips/kernel/r2300_switch.S b/arch/mips/kernel/r2300_switch.S
index 5266c6ee2b3581219dd9f4f73be1d9ddb7c1a3e8..276d6a5a0906f46fd59df72fafbc7d26cb141ebf 100644 (file)
--- a/arch/mips/kernel/r2300_switch.S
+++ b/arch/mips/kernel/r2300_switch.S
@@ -22,6 +22,7 @@
 #include <asm/asmmacro.h>
 
        .set    mips1
+       .set    hardfloat
        .align  5
 
 /*

diff --git a/arch/mips/kernel/r4k_fpu.S b/arch/mips/kernel/r4k_fpu.S
index 2ab6800977aa1d2e50790ba332dea7d15db00927..0b2252ef3a305eac1e5d5d1734032458649093a4 100644 (file)
--- a/arch/mips/kernel/r4k_fpu.S
+++ b/arch/mips/kernel/r4k_fpu.S
@@ -35,6 +35,7 @@
 #else
        .set    mips3
 #endif
+       .set    hardfloat
 
 LEAF(_save_fp_context)
        cfc1    t1, fcr31

diff --git a/arch/mips/kernel/r4k_switch.S b/arch/mips/kernel/r4k_switch.S
index ba5bb5d166810e8656779a50c6934d5e05d95cf1..41ea4f5f5a5c1c7d76148bdd2fa0843441879f9c 100644 (file)
--- a/arch/mips/kernel/r4k_switch.S
+++ b/arch/mips/kernel/r4k_switch.S
@@ -43,6 +43,7 @@
  *                    struct thread_info *next_ti, int usedfpu)
  */
        .align  5
+       .set hardfloat
        LEAF(resume)
        mfc0    t1, CP0_STATUS
        LONG_S  t1, THREAD_STATUS(a0)

diff --git a/arch/mips/kernel/r6000_fpu.S b/arch/mips/kernel/r6000_fpu.S
index da0fbe46d83b040dc54a300d7be5324ce51f1ab3..c13e3ff0e3b89542d22c90e9e29b7204d3c319f0 100644 (file)
--- a/arch/mips/kernel/r6000_fpu.S
+++ b/arch/mips/kernel/r6000_fpu.S
@@ -17,6 +17,7 @@
 #include <asm/regdef.h>
 
        .set    noreorder
+       .set    hardfloat
        .set    mips2
        /* Save floating point context */
        LEAF(_save_fp_context)

diff --git a/arch/mips/kernel/unaligned.c b/arch/mips/kernel/unaligned.c
index e2569b785be2a0ed6b20d7c85f85c2d27f7f78d8..26441622751617f93e518aa53cc630434f27ba7f 100644 (file)
--- a/arch/mips/kernel/unaligned.c
+++ b/arch/mips/kernel/unaligned.c
@@ -1168,38 +1168,38 @@ asmlinkage void do_cpu(struct pt_regs *regs);
 static inline void dmtc1(unsigned long val, unsigned reg)
 {
        switch (reg) {
-       case 0: __asm__ __volatile__ ("dmtc1\t%0,$0"::"r"(val)); break;
-       case 1: __asm__ __volatile__ ("dmtc1\t%0,$1"::"r"(val)); break;
-       case 2: __asm__ __volatile__ ("dmtc1\t%0,$2"::"r"(val)); break;
-       case 3: __asm__ __volatile__ ("dmtc1\t%0,$3"::"r"(val)); break;
-       case 4: __asm__ __volatile__ ("dmtc1\t%0,$4"::"r"(val)); break;
-       case 5: __asm__ __volatile__ ("dmtc1\t%0,$5"::"r"(val)); break;
-       case 6: __asm__ __volatile__ ("dmtc1\t%0,$6"::"r"(val)); break;
-       case 7: __asm__ __volatile__ ("dmtc1\t%0,$7"::"r"(val)); break;
-       case 8: __asm__ __volatile__ ("dmtc1\t%0,$8"::"r"(val)); break;
-       case 9: __asm__ __volatile__ ("dmtc1\t%0,$9"::"r"(val)); break;
-       case 10: __asm__ __volatile__ ("dmtc1\t%0,$10"::"r"(val)); break;
-       case 11: __asm__ __volatile__ ("dmtc1\t%0,$11"::"r"(val)); break;
-       case 12: __asm__ __volatile__ ("dmtc1\t%0,$12"::"r"(val)); break;
-       case 13: __asm__ __volatile__ ("dmtc1\t%0,$13"::"r"(val)); break;
-       case 14: __asm__ __volatile__ ("dmtc1\t%0,$14"::"r"(val)); break;
-       case 15: __asm__ __volatile__ ("dmtc1\t%0,$15"::"r"(val)); break;
-       case 16: __asm__ __volatile__ ("dmtc1\t%0,$16"::"r"(val)); break;
-       case 17: __asm__ __volatile__ ("dmtc1\t%0,$17"::"r"(val)); break;
-       case 18: __asm__ __volatile__ ("dmtc1\t%0,$18"::"r"(val)); break;
-       case 19: __asm__ __volatile__ ("dmtc1\t%0,$19"::"r"(val)); break;
-       case 20: __asm__ __volatile__ ("dmtc1\t%0,$20"::"r"(val)); break;
-       case 21: __asm__ __volatile__ ("dmtc1\t%0,$21"::"r"(val)); break;
-       case 22: __asm__ __volatile__ ("dmtc1\t%0,$22"::"r"(val)); break;
-       case 23: __asm__ __volatile__ ("dmtc1\t%0,$23"::"r"(val)); break;
-       case 24: __asm__ __volatile__ ("dmtc1\t%0,$24"::"r"(val)); break;
-       case 25: __asm__ __volatile__ ("dmtc1\t%0,$25"::"r"(val)); break;
-       case 26: __asm__ __volatile__ ("dmtc1\t%0,$26"::"r"(val)); break;
-       case 27: __asm__ __volatile__ ("dmtc1\t%0,$27"::"r"(val)); break;
-       case 28: __asm__ __volatile__ ("dmtc1\t%0,$28"::"r"(val)); break;
-       case 29: __asm__ __volatile__ ("dmtc1\t%0,$29"::"r"(val)); break;
-       case 30: __asm__ __volatile__ ("dmtc1\t%0,$30"::"r"(val)); break;
-       case 31: __asm__ __volatile__ ("dmtc1\t%0,$31"::"r"(val)); break;
+       case 0: __asm__ __volatile__ (".set push\n.set hardfloat\ndmtc1\t%0,$0\n.set pop"::"r"(val)); break;
+       case 1: __asm__ __volatile__ (".set push\n.set hardfloat\ndmtc1\t%0,$1\n.set pop"::"r"(val)); break;
+       case 2: __asm__ __volatile__ (".set push\n.set hardfloat\ndmtc1\t%0,$2\n.set pop"::"r"(val)); break;
+       case 3: __asm__ __volatile__ (".set push\n.set hardfloat\ndmtc1\t%0,$3\n.set pop"::"r"(val)); break;
+       case 4: __asm__ __volatile__ (".set push\n.set hardfloat\ndmtc1\t%0,$4\n.set pop"::"r"(val)); break;
+       case 5: __asm__ __volatile__ (".set push\n.set hardfloat\ndmtc1\t%0,$5\n.set pop"::"r"(val)); break;
+       case 6: __asm__ __volatile__ (".set push\n.set hardfloat\ndmtc1\t%0,$6\n.set pop"::"r"(val)); break;
+       case 7: __asm__ __volatile__ (".set push\n.set hardfloat\ndmtc1\t%0,$7\n.set pop"::"r"(val)); break;
+       case 8: __asm__ __volatile__ (".set push\n.set hardfloat\ndmtc1\t%0,$8\n.set pop"::"r"(val)); break;
+       case 9: __asm__ __volatile__ (".set push\n.set hardfloat\ndmtc1\t%0,$9\n.set pop"::"r"(val)); break;
+       case 10: __asm__ __volatile__ (".set push\n.set hardfloat\ndmtc1\t%0,$10\n.set pop"::"r"(val)); break;
+       case 11: __asm__ __volatile__ (".set push\n.set hardfloat\ndmtc1\t%0,$11\n.set pop"::"r"(val)); break;
+       case 12: __asm__ __volatile__ (".set push\n.set hardfloat\ndmtc1\t%0,$12\n.set pop"::"r"(val)); break;
+       case 13: __asm__ __volatile__ (".set push\n.set hardfloat\ndmtc1\t%0,$13\n.set pop"::"r"(val)); break;
+       case 14: __asm__ __volatile__ (".set push\n.set hardfloat\ndmtc1\t%0,$14\n.set pop"::"r"(val)); break;
+       case 15: __asm__ __volatile__ (".set push\n.set hardfloat\ndmtc1\t%0,$15\n.set pop"::"r"(val)); break;
+       case 16: __asm__ __volatile__ (".set push\n.set hardfloat\ndmtc1\t%0,$16\n.set pop"::"r"(val)); break;
+       case 17: __asm__ __volatile__ (".set push\n.set hardfloat\ndmtc1\t%0,$17\n.set pop"::"r"(val)); break;
+       case 18: __asm__ __volatile__ (".set push\n.set hardfloat\ndmtc1\t%0,$18\n.set pop"::"r"(val)); break;
+       case 19: __asm__ __volatile__ (".set push\n.set hardfloat\ndmtc1\t%0,$19\n.set pop"::"r"(val)); break;
+       case 20: __asm__ __volatile__ (".set push\n.set hardfloat\ndmtc1\t%0,$20\n.set pop"::"r"(val)); break;
+       case 21: __asm__ __volatile__ (".set push\n.set hardfloat\ndmtc1\t%0,$21\n.set pop"::"r"(val)); break;
+       case 22: __asm__ __volatile__ (".set push\n.set hardfloat\ndmtc1\t%0,$22\n.set pop"::"r"(val)); break;
+       case 23: __asm__ __volatile__ (".set push\n.set hardfloat\ndmtc1\t%0,$23\n.set pop"::"r"(val)); break;
+       case 24: __asm__ __volatile__ (".set push\n.set hardfloat\ndmtc1\t%0,$24\n.set pop"::"r"(val)); break;
+       case 25: __asm__ __volatile__ (".set push\n.set hardfloat\ndmtc1\t%0,$25\n.set pop"::"r"(val)); break;
+       case 26: __asm__ __volatile__ (".set push\n.set hardfloat\ndmtc1\t%0,$26\n.set pop"::"r"(val)); break;
+       case 27: __asm__ __volatile__ (".set push\n.set hardfloat\ndmtc1\t%0,$27\n.set pop"::"r"(val)); break;
+       case 28: __asm__ __volatile__ (".set push\n.set hardfloat\ndmtc1\t%0,$28\n.set pop"::"r"(val)); break;
+       case 29: __asm__ __volatile__ (".set push\n.set hardfloat\ndmtc1\t%0,$29\n.set pop"::"r"(val)); break;
+       case 30: __asm__ __volatile__ (".set push\n.set hardfloat\ndmtc1\t%0,$30\n.set pop"::"r"(val)); break;
+       case 31: __asm__ __volatile__ (".set push\n.set hardfloat\ndmtc1\t%0,$31\n.set pop"::"r"(val)); break;
        }
 }
 
@@ -1208,38 +1208,38 @@ static inline unsigned long dmfc1(unsigned reg)
        unsigned long uninitialized_var(val);
 
        switch (reg) {
-       case 0: __asm__ __volatile__ ("dmfc1\t%0,$0":"=r"(val)); break;
-       case 1: __asm__ __volatile__ ("dmfc1\t%0,$1":"=r"(val)); break;
-       case 2: __asm__ __volatile__ ("dmfc1\t%0,$2":"=r"(val)); break;
-       case 3: __asm__ __volatile__ ("dmfc1\t%0,$3":"=r"(val)); break;
-       case 4: __asm__ __volatile__ ("dmfc1\t%0,$4":"=r"(val)); break;
-       case 5: __asm__ __volatile__ ("dmfc1\t%0,$5":"=r"(val)); break;
-       case 6: __asm__ __volatile__ ("dmfc1\t%0,$6":"=r"(val)); break;
-       case 7: __asm__ __volatile__ ("dmfc1\t%0,$7":"=r"(val)); break;
-       case 8: __asm__ __volatile__ ("dmfc1\t%0,$8":"=r"(val)); break;
-       case 9: __asm__ __volatile__ ("dmfc1\t%0,$9":"=r"(val)); break;
-       case 10: __asm__ __volatile__ ("dmfc1\t%0,$10":"=r"(val)); break;
-       case 11: __asm__ __volatile__ ("dmfc1\t%0,$11":"=r"(val)); break;
-       case 12: __asm__ __volatile__ ("dmfc1\t%0,$12":"=r"(val)); break;
-       case 13: __asm__ __volatile__ ("dmfc1\t%0,$13":"=r"(val)); break;
-       case 14: __asm__ __volatile__ ("dmfc1\t%0,$14":"=r"(val)); break;
-       case 15: __asm__ __volatile__ ("dmfc1\t%0,$15":"=r"(val)); break;
-       case 16: __asm__ __volatile__ ("dmfc1\t%0,$16":"=r"(val)); break;
-       case 17: __asm__ __volatile__ ("dmfc1\t%0,$17":"=r"(val)); break;
-       case 18: __asm__ __volatile__ ("dmfc1\t%0,$18":"=r"(val)); break;
-       case 19: __asm__ __volatile__ ("dmfc1\t%0,$19":"=r"(val)); break;
-       case 20: __asm__ __volatile__ ("dmfc1\t%0,$20":"=r"(val)); break;
-       case 21: __asm__ __volatile__ ("dmfc1\t%0,$21":"=r"(val)); break;
-       case 22: __asm__ __volatile__ ("dmfc1\t%0,$22":"=r"(val)); break;
-       case 23: __asm__ __volatile__ ("dmfc1\t%0,$23":"=r"(val)); break;
-       case 24: __asm__ __volatile__ ("dmfc1\t%0,$24":"=r"(val)); break;
-       case 25: __asm__ __volatile__ ("dmfc1\t%0,$25":"=r"(val)); break;
-       case 26: __asm__ __volatile__ ("dmfc1\t%0,$26":"=r"(val)); break;
-       case 27: __asm__ __volatile__ ("dmfc1\t%0,$27":"=r"(val)); break;
-       case 28: __asm__ __volatile__ ("dmfc1\t%0,$28":"=r"(val)); break;
-       case 29: __asm__ __volatile__ ("dmfc1\t%0,$29":"=r"(val)); break;
-       case 30: __asm__ __volatile__ ("dmfc1\t%0,$30":"=r"(val)); break;
-       case 31: __asm__ __volatile__ ("dmfc1\t%0,$31":"=r"(val)); break;
+       case 0: __asm__ __volatile__ (".set push\n.set hardfloat\ndmfc1\t%0,$0\n.set pop":"=r"(val)); break;
+       case 1: __asm__ __volatile__ (".set push\n.set hardfloat\ndmfc1\t%0,$1\n.set pop":"=r"(val)); break;
+       case 2: __asm__ __volatile__ (".set push\n.set hardfloat\ndmfc1\t%0,$2\n.set pop":"=r"(val)); break;
+       case 3: __asm__ __volatile__ (".set push\n.set hardfloat\ndmfc1\t%0,$3\n.set pop":"=r"(val)); break;
+       case 4: __asm__ __volatile__ (".set push\n.set hardfloat\ndmfc1\t%0,$4\n.set pop":"=r"(val)); break;
+       case 5: __asm__ __volatile__ (".set push\n.set hardfloat\ndmfc1\t%0,$5\n.set pop":"=r"(val)); break;
+       case 6: __asm__ __volatile__ (".set push\n.set hardfloat\ndmfc1\t%0,$6\n.set pop":"=r"(val)); break;
+       case 7: __asm__ __volatile__ (".set push\n.set hardfloat\ndmfc1\t%0,$7\n.set pop":"=r"(val)); break;
+       case 8: __asm__ __volatile__ (".set push\n.set hardfloat\ndmfc1\t%0,$8\n.set pop":"=r"(val)); break;
+       case 9: __asm__ __volatile__ (".set push\n.set hardfloat\ndmfc1\t%0,$9\n.set pop":"=r"(val)); break;
+       case 10: __asm__ __volatile__ (".set push\n.set hardfloat\ndmfc1\t%0,$10\n.set pop":"=r"(val)); break;
+       case 11: __asm__ __volatile__ (".set push\n.set hardfloat\ndmfc1\t%0,$11\n.set pop":"=r"(val)); break;
+       case 12: __asm__ __volatile__ (".set push\n.set hardfloat\ndmfc1\t%0,$12\n.set pop":"=r"(val)); break;
+       case 13: __asm__ __volatile__ (".set push\n.set hardfloat\ndmfc1\t%0,$13\n.set pop":"=r"(val)); break;
+       case 14: __asm__ __volatile__ (".set push\n.set hardfloat\ndmfc1\t%0,$14\n.set pop":"=r"(val)); break;
+       case 15: __asm__ __volatile__ (".set push\n.set hardfloat\ndmfc1\t%0,$15\n.set pop":"=r"(val)); break;
+       case 16: __asm__ __volatile__ (".set push\n.set hardfloat\ndmfc1\t%0,$16\n.set pop":"=r"(val)); break;
+       case 17: __asm__ __volatile__ (".set push\n.set hardfloat\ndmfc1\t%0,$17\n.set pop":"=r"(val)); break;
+       case 18: __asm__ __volatile__ (".set push\n.set hardfloat\ndmfc1\t%0,$18\n.set pop":"=r"(val)); break;
+       case 19: __asm__ __volatile__ (".set push\n.set hardfloat\ndmfc1\t%0,$19\n.set pop":"=r"(val)); break;
+       case 20: __asm__ __volatile__ (".set push\n.set hardfloat\ndmfc1\t%0,$20\n.set pop":"=r"(val)); break;
+       case 21: __asm__ __volatile__ (".set push\n.set hardfloat\ndmfc1\t%0,$21\n.set pop":"=r"(val)); break;
+       case 22: __asm__ __volatile__ (".set push\n.set hardfloat\ndmfc1\t%0,$22\n.set pop":"=r"(val)); break;
+       case 23: __asm__ __volatile__ (".set push\n.set hardfloat\ndmfc1\t%0,$23\n.set pop":"=r"(val)); break;
+       case 24: __asm__ __volatile__ (".set push\n.set hardfloat\ndmfc1\t%0,$24\n.set pop":"=r"(val)); break;
+       case 25: __asm__ __volatile__ (".set push\n.set hardfloat\ndmfc1\t%0,$25\n.set pop":"=r"(val)); break;
+       case 26: __asm__ __volatile__ (".set push\n.set hardfloat\ndmfc1\t%0,$26\n.set pop":"=r"(val)); break;
+       case 27: __asm__ __volatile__ (".set push\n.set hardfloat\ndmfc1\t%0,$27\n.set pop":"=r"(val)); break;
+       case 28: __asm__ __volatile__ (".set push\n.set hardfloat\ndmfc1\t%0,$28\n.set pop":"=r"(val)); break;
+       case 29: __asm__ __volatile__ (".set push\n.set hardfloat\ndmfc1\t%0,$29\n.set pop":"=r"(val)); break;
+       case 30: __asm__ __volatile__ (".set push\n.set hardfloat\ndmfc1\t%0,$30\n.set pop":"=r"(val)); break;
+       case 31: __asm__ __volatile__ (".set push\n.set hardfloat\ndmfc1\t%0,$31\n.set pop":"=r"(val)); break;
        }
 
        return val;
@@ -1250,73 +1250,73 @@ static inline void mtc1_mthc1(unsigned long val, unsigned long val2, unsigned re
 {
        switch (reg) {
 #ifdef __BIG_ENDIAN
-       case 0:  __asm__ __volatile__ ("mtc1\t%0,$0\n\tmthc1\t%1,$0"::"r"(val2),"r"(val)); break;
-       case 1:  __asm__ __volatile__ ("mtc1\t%0,$1\n\tmthc1\t%1,$1"::"r"(val2),"r"(val)); break;
-       case 2:  __asm__ __volatile__ ("mtc1\t%0,$2\n\tmthc1\t%1,$2"::"r"(val2),"r"(val)); break;
-       case 3:  __asm__ __volatile__ ("mtc1\t%0,$3\n\tmthc1\t%1,$3"::"r"(val2),"r"(val)); break;
-       case 4:  __asm__ __volatile__ ("mtc1\t%0,$4\n\tmthc1\t%1,$4"::"r"(val2),"r"(val)); break;
-       case 5:  __asm__ __volatile__ ("mtc1\t%0,$5\n\tmthc1\t%1,$5"::"r"(val2),"r"(val)); break;
-       case 6:  __asm__ __volatile__ ("mtc1\t%0,$6\n\tmthc1\t%1,$6"::"r"(val2),"r"(val)); break;
-       case 7:  __asm__ __volatile__ ("mtc1\t%0,$7\n\tmthc1\t%1,$7"::"r"(val2),"r"(val)); break;
-       case 8:  __asm__ __volatile__ ("mtc1\t%0,$8\n\tmthc1\t%1,$8"::"r"(val2),"r"(val)); break;
-       case 9:  __asm__ __volatile__ ("mtc1\t%0,$9\n\tmthc1\t%1,$9"::"r"(val2),"r"(val)); break;
-       case 10: __asm__ __volatile__ ("mtc1\t%0,$10\n\tmthc1\t%1,$10"::"r"(val2),"r"(val)); break;
-       case 11: __asm__ __volatile__ ("mtc1\t%0,$11\n\tmthc1\t%1,$11"::"r"(val2),"r"(val)); break;
-       case 12: __asm__ __volatile__ ("mtc1\t%0,$12\n\tmthc1\t%1,$12"::"r"(val2),"r"(val)); break;
-       case 13: __asm__ __volatile__ ("mtc1\t%0,$13\n\tmthc1\t%1,$13"::"r"(val2),"r"(val)); break;
-       case 14: __asm__ __volatile__ ("mtc1\t%0,$14\n\tmthc1\t%1,$14"::"r"(val2),"r"(val)); break;
-       case 15: __asm__ __volatile__ ("mtc1\t%0,$15\n\tmthc1\t%1,$15"::"r"(val2),"r"(val)); break;
-       case 16: __asm__ __volatile__ ("mtc1\t%0,$16\n\tmthc1\t%1,$16"::"r"(val2),"r"(val)); break;
-       case 17: __asm__ __volatile__ ("mtc1\t%0,$17\n\tmthc1\t%1,$17"::"r"(val2),"r"(val)); break;
-       case 18: __asm__ __volatile__ ("mtc1\t%0,$18\n\tmthc1\t%1,$18"::"r"(val2),"r"(val)); break;
-       case 19: __asm__ __volatile__ ("mtc1\t%0,$19\n\tmthc1\t%1,$19"::"r"(val2),"r"(val)); break;
-       case 20: __asm__ __volatile__ ("mtc1\t%0,$20\n\tmthc1\t%1,$20"::"r"(val2),"r"(val)); break;
-       case 21: __asm__ __volatile__ ("mtc1\t%0,$21\n\tmthc1\t%1,$21"::"r"(val2),"r"(val)); break;
-       case 22: __asm__ __volatile__ ("mtc1\t%0,$22\n\tmthc1\t%1,$22"::"r"(val2),"r"(val)); break;
-       case 23: __asm__ __volatile__ ("mtc1\t%0,$23\n\tmthc1\t%1,$23"::"r"(val2),"r"(val)); break;
-       case 24: __asm__ __volatile__ ("mtc1\t%0,$24\n\tmthc1\t%1,$24"::"r"(val2),"r"(val)); break;
-       case 25: __asm__ __volatile__ ("mtc1\t%0,$25\n\tmthc1\t%1,$25"::"r"(val2),"r"(val)); break;
-       case 26: __asm__ __volatile__ ("mtc1\t%0,$26\n\tmthc1\t%1,$26"::"r"(val2),"r"(val)); break;
-       case 27: __asm__ __volatile__ ("mtc1\t%0,$27\n\tmthc1\t%1,$27"::"r"(val2),"r"(val)); break;
-       case 28: __asm__ __volatile__ ("mtc1\t%0,$28\n\tmthc1\t%1,$28"::"r"(val2),"r"(val)); break;
-       case 29: __asm__ __volatile__ ("mtc1\t%0,$29\n\tmthc1\t%1,$29"::"r"(val2),"r"(val)); break;
-       case 30: __asm__ __volatile__ ("mtc1\t%0,$30\n\tmthc1\t%1,$30"::"r"(val2),"r"(val)); break;
-       case 31: __asm__ __volatile__ ("mtc1\t%0,$31\n\tmthc1\t%1,$31"::"r"(val2),"r"(val)); break;
+       case 0:  __asm__ __volatile__ (".set push\n.set hardfloat\nmtc1\t%0,$0\n\tmthc1\t%1,$0\n.set pop"::"r"(val2),"r"(val)); break;
+       case 1:  __asm__ __volatile__ (".set push\n.set hardfloat\nmtc1\t%0,$1\n\tmthc1\t%1,$1\n.set pop"::"r"(val2),"r"(val)); break;
+       case 2:  __asm__ __volatile__ (".set push\n.set hardfloat\nmtc1\t%0,$2\n\tmthc1\t%1,$2\n.set pop"::"r"(val2),"r"(val)); break;
+       case 3:  __asm__ __volatile__ (".set push\n.set hardfloat\nmtc1\t%0,$3\n\tmthc1\t%1,$3\n.set pop"::"r"(val2),"r"(val)); break;
+       case 4:  __asm__ __volatile__ (".set push\n.set hardfloat\nmtc1\t%0,$4\n\tmthc1\t%1,$4\n.set pop"::"r"(val2),"r"(val)); break;
+       case 5:  __asm__ __volatile__ (".set push\n.set hardfloat\nmtc1\t%0,$5\n\tmthc1\t%1,$5\n.set pop"::"r"(val2),"r"(val)); break;
+       case 6:  __asm__ __volatile__ (".set push\n.set hardfloat\nmtc1\t%0,$6\n\tmthc1\t%1,$6\n.set pop"::"r"(val2),"r"(val)); break;
+       case 7:  __asm__ __volatile__ (".set push\n.set hardfloat\nmtc1\t%0,$7\n\tmthc1\t%1,$7\n.set pop"::"r"(val2),"r"(val)); break;
+       case 8:  __asm__ __volatile__ (".set push\n.set hardfloat\nmtc1\t%0,$8\n\tmthc1\t%1,$8\n.set pop"::"r"(val2),"r"(val)); break;
+       case 9:  __asm__ __volatile__ (".set push\n.set hardfloat\nmtc1\t%0,$9\n\tmthc1\t%1,$9\n.set pop"::"r"(val2),"r"(val)); break;
+       case 10: __asm__ __volatile__ (".set push\n.set hardfloat\nmtc1\t%0,$10\n\tmthc1\t%1,$10\n.set pop"::"r"(val2),"r"(val)); break;
+       case 11: __asm__ __volatile__ (".set push\n.set hardfloat\nmtc1\t%0,$11\n\tmthc1\t%1,$11\n.set pop"::"r"(val2),"r"(val)); break;
+       case 12: __asm__ __volatile__ (".set push\n.set hardfloat\nmtc1\t%0,$12\n\tmthc1\t%1,$12\n.set pop"::"r"(val2),"r"(val)); break;
+       case 13: __asm__ __volatile__ (".set push\n.set hardfloat\nmtc1\t%0,$13\n\tmthc1\t%1,$13\n.set pop"::"r"(val2),"r"(val)); break;
+       case 14: __asm__ __volatile__ (".set push\n.set hardfloat\nmtc1\t%0,$14\n\tmthc1\t%1,$14\n.set pop"::"r"(val2),"r"(val)); break;
+       case 15: __asm__ __volatile__ (".set push\n.set hardfloat\nmtc1\t%0,$15\n\tmthc1\t%1,$15\n.set pop"::"r"(val2),"r"(val)); break;
+       case 16: __asm__ __volatile__ (".set push\n.set hardfloat\nmtc1\t%0,$16\n\tmthc1\t%1,$16\n.set pop"::"r"(val2),"r"(val)); break;
+       case 17: __asm__ __volatile__ (".set push\n.set hardfloat\nmtc1\t%0,$17\n\tmthc1\t%1,$17\n.set pop"::"r"(val2),"r"(val)); break;
+       case 18: __asm__ __volatile__ (".set push\n.set hardfloat\nmtc1\t%0,$18\n\tmthc1\t%1,$18\n.set pop"::"r"(val2),"r"(val)); break;
+       case 19: __asm__ __volatile__ (".set push\n.set hardfloat\nmtc1\t%0,$19\n\tmthc1\t%1,$19\n.set pop"::"r"(val2),"r"(val)); break;
+       case 20: __asm__ __volatile__ (".set push\n.set hardfloat\nmtc1\t%0,$20\n\tmthc1\t%1,$20\n.set pop"::"r"(val2),"r"(val)); break;
+       case 21: __asm__ __volatile__ (".set push\n.set hardfloat\nmtc1\t%0,$21\n\tmthc1\t%1,$21\n.set pop"::"r"(val2),"r"(val)); break;
+       case 22: __asm__ __volatile__ (".set push\n.set hardfloat\nmtc1\t%0,$22\n\tmthc1\t%1,$22\n.set pop"::"r"(val2),"r"(val)); break;
+       case 23: __asm__ __volatile__ (".set push\n.set hardfloat\nmtc1\t%0,$23\n\tmthc1\t%1,$23\n.set pop"::"r"(val2),"r"(val)); break;
+       case 24: __asm__ __volatile__ (".set push\n.set hardfloat\nmtc1\t%0,$24\n\tmthc1\t%1,$24\n.set pop"::"r"(val2),"r"(val)); break;
+       case 25: __asm__ __volatile__ (".set push\n.set hardfloat\nmtc1\t%0,$25\n\tmthc1\t%1,$25\n.set pop"::"r"(val2),"r"(val)); break;
+       case 26: __asm__ __volatile__ (".set push\n.set hardfloat\nmtc1\t%0,$26\n\tmthc1\t%1,$26\n.set pop"::"r"(val2),"r"(val)); break;
+       case 27: __asm__ __volatile__ (".set push\n.set hardfloat\nmtc1\t%0,$27\n\tmthc1\t%1,$27\n.set pop"::"r"(val2),"r"(val)); break;
+       case 28: __asm__ __volatile__ (".set push\n.set hardfloat\nmtc1\t%0,$28\n\tmthc1\t%1,$28\n.set pop"::"r"(val2),"r"(val)); break;
+       case 29: __asm__ __volatile__ (".set push\n.set hardfloat\nmtc1\t%0,$29\n\tmthc1\t%1,$29\n.set pop"::"r"(val2),"r"(val)); break;
+       case 30: __asm__ __volatile__ (".set push\n.set hardfloat\nmtc1\t%0,$30\n\tmthc1\t%1,$30\n.set pop"::"r"(val2),"r"(val)); break;
+       case 31: __asm__ __volatile__ (".set push\n.set hardfloat\nmtc1\t%0,$31\n\tmthc1\t%1,$31\n.set pop"::"r"(val2),"r"(val)); break;
        }
 #endif
 #ifdef __LITTLE_ENDIAN
-       case 0:  __asm__ __volatile__ ("mtc1\t%0,$0\n\tmthc1\t%1,$0"::"r"(val),"r"(val2)); break;
-       case 1:  __asm__ __volatile__ ("mtc1\t%0,$1\n\tmthc1\t%1,$1"::"r"(val),"r"(val2)); break;
-       case 2:  __asm__ __volatile__ ("mtc1\t%0,$2\n\tmthc1\t%1,$2"::"r"(val),"r"(val2)); break;
-       case 3:  __asm__ __volatile__ ("mtc1\t%0,$3\n\tmthc1\t%1,$3"::"r"(val),"r"(val2)); break;
-       case 4:  __asm__ __volatile__ ("mtc1\t%0,$4\n\tmthc1\t%1,$4"::"r"(val),"r"(val2)); break;
-       case 5:  __asm__ __volatile__ ("mtc1\t%0,$5\n\tmthc1\t%1,$5"::"r"(val),"r"(val2)); break;
-       case 6:  __asm__ __volatile__ ("mtc1\t%0,$6\n\tmthc1\t%1,$6"::"r"(val),"r"(val2)); break;
-       case 7:  __asm__ __volatile__ ("mtc1\t%0,$7\n\tmthc1\t%1,$7"::"r"(val),"r"(val2)); break;
-       case 8:  __asm__ __volatile__ ("mtc1\t%0,$8\n\tmthc1\t%1,$8"::"r"(val),"r"(val2)); break;
-       case 9:  __asm__ __volatile__ ("mtc1\t%0,$9\n\tmthc1\t%1,$9"::"r"(val),"r"(val2)); break;
-       case 10: __asm__ __volatile__ ("mtc1\t%0,$10\n\tmthc1\t%1,$10"::"r"(val),"r"(val2)); break;
-       case 11: __asm__ __volatile__ ("mtc1\t%0,$11\n\tmthc1\t%1,$11"::"r"(val),"r"(val2)); break;
-       case 12: __asm__ __volatile__ ("mtc1\t%0,$12\n\tmthc1\t%1,$12"::"r"(val),"r"(val2)); break;
-       case 13: __asm__ __volatile__ ("mtc1\t%0,$13\n\tmthc1\t%1,$13"::"r"(val),"r"(val2)); break;
-       case 14: __asm__ __volatile__ ("mtc1\t%0,$14\n\tmthc1\t%1,$14"::"r"(val),"r"(val2)); break;
-       case 15: __asm__ __volatile__ ("mtc1\t%0,$15\n\tmthc1\t%1,$15"::"r"(val),"r"(val2)); break;
-       case 16: __asm__ __volatile__ ("mtc1\t%0,$16\n\tmthc1\t%1,$16"::"r"(val),"r"(val2)); break;
-       case 17: __asm__ __volatile__ ("mtc1\t%0,$17\n\tmthc1\t%1,$17"::"r"(val),"r"(val2)); break;
-       case 18: __asm__ __volatile__ ("mtc1\t%0,$18\n\tmthc1\t%1,$18"::"r"(val),"r"(val2)); break;
-       case 19: __asm__ __volatile__ ("mtc1\t%0,$19\n\tmthc1\t%1,$19"::"r"(val),"r"(val2)); break;
-       case 20: __asm__ __volatile__ ("mtc1\t%0,$20\n\tmthc1\t%1,$20"::"r"(val),"r"(val2)); break;
-       case 21: __asm__ __volatile__ ("mtc1\t%0,$21\n\tmthc1\t%1,$21"::"r"(val),"r"(val2)); break;
-       case 22: __asm__ __volatile__ ("mtc1\t%0,$22\n\tmthc1\t%1,$22"::"r"(val),"r"(val2)); break;
-       case 23: __asm__ __volatile__ ("mtc1\t%0,$23\n\tmthc1\t%1,$23"::"r"(val),"r"(val2)); break;
-       case 24: __asm__ __volatile__ ("mtc1\t%0,$24\n\tmthc1\t%1,$24"::"r"(val),"r"(val2)); break;
-       case 25: __asm__ __volatile__ ("mtc1\t%0,$25\n\tmthc1\t%1,$25"::"r"(val),"r"(val2)); break;
-       case 26: __asm__ __volatile__ ("mtc1\t%0,$26\n\tmthc1\t%1,$26"::"r"(val),"r"(val2)); break;
-       case 27: __asm__ __volatile__ ("mtc1\t%0,$27\n\tmthc1\t%1,$27"::"r"(val),"r"(val2)); break;
-       case 28: __asm__ __volatile__ ("mtc1\t%0,$28\n\tmthc1\t%1,$28"::"r"(val),"r"(val2)); break;
-       case 29: __asm__ __volatile__ ("mtc1\t%0,$29\n\tmthc1\t%1,$29"::"r"(val),"r"(val2)); break;
-       case 30: __asm__ __volatile__ ("mtc1\t%0,$30\n\tmthc1\t%1,$30"::"r"(val),"r"(val2)); break;
-       case 31: __asm__ __volatile__ ("mtc1\t%0,$31\n\tmthc1\t%1,$31"::"r"(val),"r"(val2)); break;
+       case 0:  __asm__ __volatile__ (".set push\n.set hardfloat\nmtc1\t%0,$0\n\tmthc1\t%1,$0\n.set pop"::"r"(val),"r"(val2)); break;
+       case 1:  __asm__ __volatile__ (".set push\n.set hardfloat\nmtc1\t%0,$1\n\tmthc1\t%1,$1\n.set pop"::"r"(val),"r"(val2)); break;
+       case 2:  __asm__ __volatile__ (".set push\n.set hardfloat\nmtc1\t%0,$2\n\tmthc1\t%1,$2\n.set pop"::"r"(val),"r"(val2)); break;
+       case 3:  __asm__ __volatile__ (".set push\n.set hardfloat\nmtc1\t%0,$3\n\tmthc1\t%1,$3\n.set pop"::"r"(val),"r"(val2)); break;
+       case 4:  __asm__ __volatile__ (".set push\n.set hardfloat\nmtc1\t%0,$4\n\tmthc1\t%1,$4\n.set pop"::"r"(val),"r"(val2)); break;
+       case 5:  __asm__ __volatile__ (".set push\n.set hardfloat\nmtc1\t%0,$5\n\tmthc1\t%1,$5\n.set pop"::"r"(val),"r"(val2)); break;
+       case 6:  __asm__ __volatile__ (".set push\n.set hardfloat\nmtc1\t%0,$6\n\tmthc1\t%1,$6\n.set pop"::"r"(val),"r"(val2)); break;
+       case 7:  __asm__ __volatile__ (".set push\n.set hardfloat\nmtc1\t%0,$7\n\tmthc1\t%1,$7\n.set pop"::"r"(val),"r"(val2)); break;
+       case 8:  __asm__ __volatile__ (".set push\n.set hardfloat\nmtc1\t%0,$8\n\tmthc1\t%1,$8\n.set pop"::"r"(val),"r"(val2)); break;
+       case 9:  __asm__ __volatile__ (".set push\n.set hardfloat\nmtc1\t%0,$9\n\tmthc1\t%1,$9\n.set pop"::"r"(val),"r"(val2)); break;
+       case 10: __asm__ __volatile__ (".set push\n.set hardfloat\nmtc1\t%0,$10\n\tmthc1\t%1,$10\n.set pop"::"r"(val),"r"(val2)); break;
+       case 11: __asm__ __volatile__ (".set push\n.set hardfloat\nmtc1\t%0,$11\n\tmthc1\t%1,$11\n.set pop"::"r"(val),"r"(val2)); break;
+       case 12: __asm__ __volatile__ (".set push\n.set hardfloat\nmtc1\t%0,$12\n\tmthc1\t%1,$12\n.set pop"::"r"(val),"r"(val2)); break;
+       case 13: __asm__ __volatile__ (".set push\n.set hardfloat\nmtc1\t%0,$13\n\tmthc1\t%1,$13\n.set pop"::"r"(val),"r"(val2)); break;
+       case 14: __asm__ __volatile__ (".set push\n.set hardfloat\nmtc1\t%0,$14\n\tmthc1\t%1,$14\n.set pop"::"r"(val),"r"(val2)); break;
+       case 15: __asm__ __volatile__ (".set push\n.set hardfloat\nmtc1\t%0,$15\n\tmthc1\t%1,$15\n.set pop"::"r"(val),"r"(val2)); break;
+       case 16: __asm__ __volatile__ (".set push\n.set hardfloat\nmtc1\t%0,$16\n\tmthc1\t%1,$16\n.set pop"::"r"(val),"r"(val2)); break;
+       case 17: __asm__ __volatile__ (".set push\n.set hardfloat\nmtc1\t%0,$17\n\tmthc1\t%1,$17\n.set pop"::"r"(val),"r"(val2)); break;
+       case 18: __asm__ __volatile__ (".set push\n.set hardfloat\nmtc1\t%0,$18\n\tmthc1\t%1,$18\n.set pop"::"r"(val),"r"(val2)); break;
+       case 19: __asm__ __volatile__ (".set push\n.set hardfloat\nmtc1\t%0,$19\n\tmthc1\t%1,$19\n.set pop"::"r"(val),"r"(val2)); break;
+       case 20: __asm__ __volatile__ (".set push\n.set hardfloat\nmtc1\t%0,$20\n\tmthc1\t%1,$20\n.set pop"::"r"(val),"r"(val2)); break;
+       case 21: __asm__ __volatile__ (".set push\n.set hardfloat\nmtc1\t%0,$21\n\tmthc1\t%1,$21\n.set pop"::"r"(val),"r"(val2)); break;
+       case 22: __asm__ __volatile__ (".set push\n.set hardfloat\nmtc1\t%0,$22\n\tmthc1\t%1,$22\n.set pop"::"r"(val),"r"(val2)); break;
+       case 23: __asm__ __volatile__ (".set push\n.set hardfloat\nmtc1\t%0,$23\n\tmthc1\t%1,$23\n.set pop"::"r"(val),"r"(val2)); break;
+       case 24: __asm__ __volatile__ (".set push\n.set hardfloat\nmtc1\t%0,$24\n\tmthc1\t%1,$24\n.set pop"::"r"(val),"r"(val2)); break;
+       case 25: __asm__ __volatile__ (".set push\n.set hardfloat\nmtc1\t%0,$25\n\tmthc1\t%1,$25\n.set pop"::"r"(val),"r"(val2)); break;
+       case 26: __asm__ __volatile__ (".set push\n.set hardfloat\nmtc1\t%0,$26\n\tmthc1\t%1,$26\n.set pop"::"r"(val),"r"(val2)); break;
+       case 27: __asm__ __volatile__ (".set push\n.set hardfloat\nmtc1\t%0,$27\n\tmthc1\t%1,$27\n.set pop"::"r"(val),"r"(val2)); break;
+       case 28: __asm__ __volatile__ (".set push\n.set hardfloat\nmtc1\t%0,$28\n\tmthc1\t%1,$28\n.set pop"::"r"(val),"r"(val2)); break;
+       case 29: __asm__ __volatile__ (".set push\n.set hardfloat\nmtc1\t%0,$29\n\tmthc1\t%1,$29\n.set pop"::"r"(val),"r"(val2)); break;
+       case 30: __asm__ __volatile__ (".set push\n.set hardfloat\nmtc1\t%0,$30\n\tmthc1\t%1,$30\n.set pop"::"r"(val),"r"(val2)); break;
+       case 31: __asm__ __volatile__ (".set push\n.set hardfloat\nmtc1\t%0,$31\n\tmthc1\t%1,$31\n.set pop"::"r"(val),"r"(val2)); break;
        }
 #endif
 }
@@ -1327,72 +1327,72 @@ static inline void mfc1_mfhc1(unsigned long *val, unsigned long *val2, unsigned
 
        switch (reg) {
 #ifdef __BIG_ENDIAN
-       case 0:  __asm__ __volatile__ ("mfc1\t%0,$0\n\tmfhc1\t%1,$0":"=r"(lval2),"=r"(lval)); break;
-       case 1:  __asm__ __volatile__ ("mfc1\t%0,$1\n\tmfhc1\t%1,$1":"=r"(lval2),"=r"(lval)); break;
-       case 2:  __asm__ __volatile__ ("mfc1\t%0,$2\n\tmfhc1\t%1,$2":"=r"(lval2),"=r"(lval)); break;
-       case 3:  __asm__ __volatile__ ("mfc1\t%0,$3\n\tmfhc1\t%1,$3":"=r"(lval2),"=r"(lval)); break;
-       case 4:  __asm__ __volatile__ ("mfc1\t%0,$4\n\tmfhc1\t%1,$4":"=r"(lval2),"=r"(lval)); break;
-       case 5:  __asm__ __volatile__ ("mfc1\t%0,$5\n\tmfhc1\t%1,$5":"=r"(lval2),"=r"(lval)); break;
-       case 6:  __asm__ __volatile__ ("mfc1\t%0,$6\n\tmfhc1\t%1,$6":"=r"(lval2),"=r"(lval)); break;
-       case 7:  __asm__ __volatile__ ("mfc1\t%0,$7\n\tmfhc1\t%1,$7":"=r"(lval2),"=r"(lval)); break;
-       case 8:  __asm__ __volatile__ ("mfc1\t%0,$8\n\tmfhc1\t%1,$8":"=r"(lval2),"=r"(lval)); break;
-       case 9:  __asm__ __volatile__ ("mfc1\t%0,$9\n\tmfhc1\t%1,$9":"=r"(lval2),"=r"(lval)); break;
-       case 10: __asm__ __volatile__ ("mfc1\t%0,$10\n\tmfhc1\t%1,$10":"=r"(lval2),"=r"(lval)); break;
-       case 11: __asm__ __volatile__ ("mfc1\t%0,$11\n\tmfhc1\t%1,$11":"=r"(lval2),"=r"(lval)); break;
-       case 12: __asm__ __volatile__ ("mfc1\t%0,$12\n\tmfhc1\t%1,$12":"=r"(lval2),"=r"(lval)); break;
-       case 13: __asm__ __volatile__ ("mfc1\t%0,$13\n\tmfhc1\t%1,$13":"=r"(lval2),"=r"(lval)); break;
-       case 14: __asm__ __volatile__ ("mfc1\t%0,$14\n\tmfhc1\t%1,$14":"=r"(lval2),"=r"(lval)); break;
-       case 15: __asm__ __volatile__ ("mfc1\t%0,$15\n\tmfhc1\t%1,$15":"=r"(lval2),"=r"(lval)); break;
-       case 16: __asm__ __volatile__ ("mfc1\t%0,$16\n\tmfhc1\t%1,$16":"=r"(lval2),"=r"(lval)); break;
-       case 17: __asm__ __volatile__ ("mfc1\t%0,$17\n\tmfhc1\t%1,$17":"=r"(lval2),"=r"(lval)); break;
-       case 18: __asm__ __volatile__ ("mfc1\t%0,$18\n\tmfhc1\t%1,$18":"=r"(lval2),"=r"(lval)); break;
-       case 19: __asm__ __volatile__ ("mfc1\t%0,$19\n\tmfhc1\t%1,$19":"=r"(lval2),"=r"(lval)); break;
-       case 20: __asm__ __volatile__ ("mfc1\t%0,$20\n\tmfhc1\t%1,$20":"=r"(lval2),"=r"(lval)); break;
-       case 21: __asm__ __volatile__ ("mfc1\t%0,$21\n\tmfhc1\t%1,$21":"=r"(lval2),"=r"(lval)); break;
-       case 22: __asm__ __volatile__ ("mfc1\t%0,$22\n\tmfhc1\t%1,$22":"=r"(lval2),"=r"(lval)); break;
-       case 23: __asm__ __volatile__ ("mfc1\t%0,$23\n\tmfhc1\t%1,$23":"=r"(lval2),"=r"(lval)); break;
-       case 24: __asm__ __volatile__ ("mfc1\t%0,$24\n\tmfhc1\t%1,$24":"=r"(lval2),"=r"(lval)); break;
-       case 25: __asm__ __volatile__ ("mfc1\t%0,$25\n\tmfhc1\t%1,$25":"=r"(lval2),"=r"(lval)); break;
-       case 26: __asm__ __volatile__ ("mfc1\t%0,$26\n\tmfhc1\t%1,$26":"=r"(lval2),"=r"(lval)); break;
-       case 27: __asm__ __volatile__ ("mfc1\t%0,$27\n\tmfhc1\t%1,$27":"=r"(lval2),"=r"(lval)); break;
-       case 28: __asm__ __volatile__ ("mfc1\t%0,$28\n\tmfhc1\t%1,$28":"=r"(lval2),"=r"(lval)); break;
-       case 29: __asm__ __volatile__ ("mfc1\t%0,$29\n\tmfhc1\t%1,$29":"=r"(lval2),"=r"(lval)); break;
-       case 30: __asm__ __volatile__ ("mfc1\t%0,$30\n\tmfhc1\t%1,$30":"=r"(lval2),"=r"(lval)); break;
-       case 31: __asm__ __volatile__ ("mfc1\t%0,$31\n\tmfhc1\t%1,$31":"=r"(lval2),"=r"(lval)); break;
+       case 0:  __asm__ __volatile__ (".set push\n.set hardfloat\nmfc1\t%0,$0\n\tmfhc1\t%1,$0\n.set pop":"=r"(lval2),"=r"(lval)); break;
+       case 1:  __asm__ __volatile__ (".set push\n.set hardfloat\nmfc1\t%0,$1\n\tmfhc1\t%1,$1\n.set pop":"=r"(lval2),"=r"(lval)); break;
+       case 2:  __asm__ __volatile__ (".set push\n.set hardfloat\nmfc1\t%0,$2\n\tmfhc1\t%1,$2\n.set pop":"=r"(lval2),"=r"(lval)); break;
+       case 3:  __asm__ __volatile__ (".set push\n.set hardfloat\nmfc1\t%0,$3\n\tmfhc1\t%1,$3\n.set pop":"=r"(lval2),"=r"(lval)); break;
+       case 4:  __asm__ __volatile__ (".set push\n.set hardfloat\nmfc1\t%0,$4\n\tmfhc1\t%1,$4\n.set pop":"=r"(lval2),"=r"(lval)); break;
+       case 5:  __asm__ __volatile__ (".set push\n.set hardfloat\nmfc1\t%0,$5\n\tmfhc1\t%1,$5\n.set pop":"=r"(lval2),"=r"(lval)); break;
+       case 6:  __asm__ __volatile__ (".set push\n.set hardfloat\nmfc1\t%0,$6\n\tmfhc1\t%1,$6\n.set pop":"=r"(lval2),"=r"(lval)); break;
+       case 7:  __asm__ __volatile__ (".set push\n.set hardfloat\nmfc1\t%0,$7\n\tmfhc1\t%1,$7\n.set pop":"=r"(lval2),"=r"(lval)); break;
+       case 8:  __asm__ __volatile__ (".set push\n.set hardfloat\nmfc1\t%0,$8\n\tmfhc1\t%1,$8\n.set pop":"=r"(lval2),"=r"(lval)); break;
+       case 9:  __asm__ __volatile__ (".set push\n.set hardfloat\nmfc1\t%0,$9\n\tmfhc1\t%1,$9\n.set pop":"=r"(lval2),"=r"(lval)); break;
+       case 10: __asm__ __volatile__ (".set push\n.set hardfloat\nmfc1\t%0,$10\n\tmfhc1\t%1,$10\n.set pop":"=r"(lval2),"=r"(lval)); break;
+       case 11: __asm__ __volatile__ (".set push\n.set hardfloat\nmfc1\t%0,$11\n\tmfhc1\t%1,$11\n.set pop":"=r"(lval2),"=r"(lval)); break;
+       case 12: __asm__ __volatile__ (".set push\n.set hardfloat\nmfc1\t%0,$12\n\tmfhc1\t%1,$12\n.set pop":"=r"(lval2),"=r"(lval)); break;
+       case 13: __asm__ __volatile__ (".set push\n.set hardfloat\nmfc1\t%0,$13\n\tmfhc1\t%1,$13\n.set pop":"=r"(lval2),"=r"(lval)); break;
+       case 14: __asm__ __volatile__ (".set push\n.set hardfloat\nmfc1\t%0,$14\n\tmfhc1\t%1,$14\n.set pop":"=r"(lval2),"=r"(lval)); break;
+       case 15: __asm__ __volatile__ (".set push\n.set hardfloat\nmfc1\t%0,$15\n\tmfhc1\t%1,$15\n.set pop":"=r"(lval2),"=r"(lval)); break;
+       case 16: __asm__ __volatile__ (".set push\n.set hardfloat\nmfc1\t%0,$16\n\tmfhc1\t%1,$16\n.set pop":"=r"(lval2),"=r"(lval)); break;
+       case 17: __asm__ __volatile__ (".set push\n.set hardfloat\nmfc1\t%0,$17\n\tmfhc1\t%1,$17\n.set pop":"=r"(lval2),"=r"(lval)); break;
+       case 18: __asm__ __volatile__ (".set push\n.set hardfloat\nmfc1\t%0,$18\n\tmfhc1\t%1,$18\n.set pop":"=r"(lval2),"=r"(lval)); break;
+       case 19: __asm__ __volatile__ (".set push\n.set hardfloat\nmfc1\t%0,$19\n\tmfhc1\t%1,$19\n.set pop":"=r"(lval2),"=r"(lval)); break;
+       case 20: __asm__ __volatile__ (".set push\n.set hardfloat\nmfc1\t%0,$20\n\tmfhc1\t%1,$20\n.set pop":"=r"(lval2),"=r"(lval)); break;
+       case 21: __asm__ __volatile__ (".set push\n.set hardfloat\nmfc1\t%0,$21\n\tmfhc1\t%1,$21\n.set pop":"=r"(lval2),"=r"(lval)); break;
+       case 22: __asm__ __volatile__ (".set push\n.set hardfloat\nmfc1\t%0,$22\n\tmfhc1\t%1,$22\n.set pop":"=r"(lval2),"=r"(lval)); break;
+       case 23: __asm__ __volatile__ (".set push\n.set hardfloat\nmfc1\t%0,$23\n\tmfhc1\t%1,$23\n.set pop":"=r"(lval2),"=r"(lval)); break;
+       case 24: __asm__ __volatile__ (".set push\n.set hardfloat\nmfc1\t%0,$24\n\tmfhc1\t%1,$24\n.set pop":"=r"(lval2),"=r"(lval)); break;
+       case 25: __asm__ __volatile__ (".set push\n.set hardfloat\nmfc1\t%0,$25\n\tmfhc1\t%1,$25\n.set pop":"=r"(lval2),"=r"(lval)); break;
+       case 26: __asm__ __volatile__ (".set push\n.set hardfloat\nmfc1\t%0,$26\n\tmfhc1\t%1,$26\n.set pop":"=r"(lval2),"=r"(lval)); break;
+       case 27: __asm__ __volatile__ (".set push\n.set hardfloat\nmfc1\t%0,$27\n\tmfhc1\t%1,$27\n.set pop":"=r"(lval2),"=r"(lval)); break;
+       case 28: __asm__ __volatile__ (".set push\n.set hardfloat\nmfc1\t%0,$28\n\tmfhc1\t%1,$28\n.set pop":"=r"(lval2),"=r"(lval)); break;
+       case 29: __asm__ __volatile__ (".set push\n.set hardfloat\nmfc1\t%0,$29\n\tmfhc1\t%1,$29\n.set pop":"=r"(lval2),"=r"(lval)); break;
+       case 30: __asm__ __volatile__ (".set push\n.set hardfloat\nmfc1\t%0,$30\n\tmfhc1\t%1,$30\n.set pop":"=r"(lval2),"=r"(lval)); break;
+       case 31: __asm__ __volatile__ (".set push\n.set hardfloat\nmfc1\t%0,$31\n\tmfhc1\t%1,$31\n.set pop":"=r"(lval2),"=r"(lval)); break;
 #endif
 #ifdef __LITTLE_ENDIAN
-       case 0:  __asm__ __volatile__ ("mfc1\t%0,$0\n\tmfhc1\t%1,$0":"=r"(lval),"=r"(lval2)); break;
-       case 1:  __asm__ __volatile__ ("mfc1\t%0,$1\n\tmfhc1\t%1,$1":"=r"(lval),"=r"(lval2)); break;
-       case 2:  __asm__ __volatile__ ("mfc1\t%0,$2\n\tmfhc1\t%1,$2":"=r"(lval),"=r"(lval2)); break;
-       case 3:  __asm__ __volatile__ ("mfc1\t%0,$3\n\tmfhc1\t%1,$3":"=r"(lval),"=r"(lval2)); break;
-       case 4:  __asm__ __volatile__ ("mfc1\t%0,$4\n\tmfhc1\t%1,$4":"=r"(lval),"=r"(lval2)); break;
-       case 5:  __asm__ __volatile__ ("mfc1\t%0,$5\n\tmfhc1\t%1,$5":"=r"(lval),"=r"(lval2)); break;
-       case 6:  __asm__ __volatile__ ("mfc1\t%0,$6\n\tmfhc1\t%1,$6":"=r"(lval),"=r"(lval2)); break;
-       case 7:  __asm__ __volatile__ ("mfc1\t%0,$7\n\tmfhc1\t%1,$7":"=r"(lval),"=r"(lval2)); break;
-       case 8:  __asm__ __volatile__ ("mfc1\t%0,$8\n\tmfhc1\t%1,$8":"=r"(lval),"=r"(lval2)); break;
-       case 9:  __asm__ __volatile__ ("mfc1\t%0,$9\n\tmfhc1\t%1,$9":"=r"(lval),"=r"(lval2)); break;
-       case 10: __asm__ __volatile__ ("mfc1\t%0,$10\n\tmfhc1\t%1,$10":"=r"(lval),"=r"(lval2)); break;
-       case 11: __asm__ __volatile__ ("mfc1\t%0,$11\n\tmfhc1\t%1,$11":"=r"(lval),"=r"(lval2)); break;
-       case 12: __asm__ __volatile__ ("mfc1\t%0,$12\n\tmfhc1\t%1,$12":"=r"(lval),"=r"(lval2)); break;
-       case 13: __asm__ __volatile__ ("mfc1\t%0,$13\n\tmfhc1\t%1,$13":"=r"(lval),"=r"(lval2)); break;
-       case 14: __asm__ __volatile__ ("mfc1\t%0,$14\n\tmfhc1\t%1,$14":"=r"(lval),"=r"(lval2)); break;
-       case 15: __asm__ __volatile__ ("mfc1\t%0,$15\n\tmfhc1\t%1,$15":"=r"(lval),"=r"(lval2)); break;
-       case 16: __asm__ __volatile__ ("mfc1\t%0,$16\n\tmfhc1\t%1,$16":"=r"(lval),"=r"(lval2)); break;
-       case 17: __asm__ __volatile__ ("mfc1\t%0,$17\n\tmfhc1\t%1,$17":"=r"(lval),"=r"(lval2)); break;
-       case 18: __asm__ __volatile__ ("mfc1\t%0,$18\n\tmfhc1\t%1,$18":"=r"(lval),"=r"(lval2)); break;
-       case 19: __asm__ __volatile__ ("mfc1\t%0,$19\n\tmfhc1\t%1,$19":"=r"(lval),"=r"(lval2)); break;
-       case 20: __asm__ __volatile__ ("mfc1\t%0,$20\n\tmfhc1\t%1,$20":"=r"(lval),"=r"(lval2)); break;
-       case 21: __asm__ __volatile__ ("mfc1\t%0,$21\n\tmfhc1\t%1,$21":"=r"(lval),"=r"(lval2)); break;
-       case 22: __asm__ __volatile__ ("mfc1\t%0,$22\n\tmfhc1\t%1,$22":"=r"(lval),"=r"(lval2)); break;
-       case 23: __asm__ __volatile__ ("mfc1\t%0,$23\n\tmfhc1\t%1,$23":"=r"(lval),"=r"(lval2)); break;
-       case 24: __asm__ __volatile__ ("mfc1\t%0,$24\n\tmfhc1\t%1,$24":"=r"(lval),"=r"(lval2)); break;
-       case 25: __asm__ __volatile__ ("mfc1\t%0,$25\n\tmfhc1\t%1,$25":"=r"(lval),"=r"(lval2)); break;
-       case 26: __asm__ __volatile__ ("mfc1\t%0,$26\n\tmfhc1\t%1,$26":"=r"(lval),"=r"(lval2)); break;
-       case 27: __asm__ __volatile__ ("mfc1\t%0,$27\n\tmfhc1\t%1,$27":"=r"(lval),"=r"(lval2)); break;
-       case 28: __asm__ __volatile__ ("mfc1\t%0,$28\n\tmfhc1\t%1,$28":"=r"(lval),"=r"(lval2)); break;
-       case 29: __asm__ __volatile__ ("mfc1\t%0,$29\n\tmfhc1\t%1,$29":"=r"(lval),"=r"(lval2)); break;
-       case 30: __asm__ __volatile__ ("mfc1\t%0,$30\n\tmfhc1\t%1,$30":"=r"(lval),"=r"(lval2)); break;
-       case 31: __asm__ __volatile__ ("mfc1\t%0,$31\n\tmfhc1\t%1,$31":"=r"(lval),"=r"(lval2)); break;
+       case 0:  __asm__ __volatile__ (".set push\n.set hardfloat\nmfc1\t%0,$0\n\tmfhc1\t%1,$0\n.set pop":"=r"(lval),"=r"(lval2)); break;
+       case 1:  __asm__ __volatile__ (".set push\n.set hardfloat\nmfc1\t%0,$1\n\tmfhc1\t%1,$1\n.set pop":"=r"(lval),"=r"(lval2)); break;
+       case 2:  __asm__ __volatile__ (".set push\n.set hardfloat\nmfc1\t%0,$2\n\tmfhc1\t%1,$2\n.set pop":"=r"(lval),"=r"(lval2)); break;
+       case 3:  __asm__ __volatile__ (".set push\n.set hardfloat\nmfc1\t%0,$3\n\tmfhc1\t%1,$3\n.set pop":"=r"(lval),"=r"(lval2)); break;
+       case 4:  __asm__ __volatile__ (".set push\n.set hardfloat\nmfc1\t%0,$4\n\tmfhc1\t%1,$4\n.set pop":"=r"(lval),"=r"(lval2)); break;
+       case 5:  __asm__ __volatile__ (".set push\n.set hardfloat\nmfc1\t%0,$5\n\tmfhc1\t%1,$5\n.set pop":"=r"(lval),"=r"(lval2)); break;
+       case 6:  __asm__ __volatile__ (".set push\n.set hardfloat\nmfc1\t%0,$6\n\tmfhc1\t%1,$6\n.set pop":"=r"(lval),"=r"(lval2)); break;
+       case 7:  __asm__ __volatile__ (".set push\n.set hardfloat\nmfc1\t%0,$7\n\tmfhc1\t%1,$7\n.set pop":"=r"(lval),"=r"(lval2)); break;
+       case 8:  __asm__ __volatile__ (".set push\n.set hardfloat\nmfc1\t%0,$8\n\tmfhc1\t%1,$8\n.set pop":"=r"(lval),"=r"(lval2)); break;
+       case 9:  __asm__ __volatile__ (".set push\n.set hardfloat\nmfc1\t%0,$9\n\tmfhc1\t%1,$9\n.set pop":"=r"(lval),"=r"(lval2)); break;
+       case 10: __asm__ __volatile__ (".set push\n.set hardfloat\nmfc1\t%0,$10\n\tmfhc1\t%1,$10\n.set pop":"=r"(lval),"=r"(lval2)); break;
+       case 11: __asm__ __volatile__ (".set push\n.set hardfloat\nmfc1\t%0,$11\n\tmfhc1\t%1,$11\n.set pop":"=r"(lval),"=r"(lval2)); break;
+       case 12: __asm__ __volatile__ (".set push\n.set hardfloat\nmfc1\t%0,$12\n\tmfhc1\t%1,$12\n.set pop":"=r"(lval),"=r"(lval2)); break;
+       case 13: __asm__ __volatile__ (".set push\n.set hardfloat\nmfc1\t%0,$13\n\tmfhc1\t%1,$13\n.set pop":"=r"(lval),"=r"(lval2)); break;
+       case 14: __asm__ __volatile__ (".set push\n.set hardfloat\nmfc1\t%0,$14\n\tmfhc1\t%1,$14\n.set pop":"=r"(lval),"=r"(lval2)); break;
+       case 15: __asm__ __volatile__ (".set push\n.set hardfloat\nmfc1\t%0,$15\n\tmfhc1\t%1,$15\n.set pop":"=r"(lval),"=r"(lval2)); break;
+       case 16: __asm__ __volatile__ (".set push\n.set hardfloat\nmfc1\t%0,$16\n\tmfhc1\t%1,$16\n.set pop":"=r"(lval),"=r"(lval2)); break;
+       case 17: __asm__ __volatile__ (".set push\n.set hardfloat\nmfc1\t%0,$17\n\tmfhc1\t%1,$17\n.set pop":"=r"(lval),"=r"(lval2)); break;
+       case 18: __asm__ __volatile__ (".set push\n.set hardfloat\nmfc1\t%0,$18\n\tmfhc1\t%1,$18\n.set pop":"=r"(lval),"=r"(lval2)); break;
+       case 19: __asm__ __volatile__ (".set push\n.set hardfloat\nmfc1\t%0,$19\n\tmfhc1\t%1,$19\n.set pop":"=r"(lval),"=r"(lval2)); break;
+       case 20: __asm__ __volatile__ (".set push\n.set hardfloat\nmfc1\t%0,$20\n\tmfhc1\t%1,$20\n.set pop":"=r"(lval),"=r"(lval2)); break;
+       case 21: __asm__ __volatile__ (".set push\n.set hardfloat\nmfc1\t%0,$21\n\tmfhc1\t%1,$21\n.set pop":"=r"(lval),"=r"(lval2)); break;
+       case 22: __asm__ __volatile__ (".set push\n.set hardfloat\nmfc1\t%0,$22\n\tmfhc1\t%1,$22\n.set pop":"=r"(lval),"=r"(lval2)); break;
+       case 23: __asm__ __volatile__ (".set push\n.set hardfloat\nmfc1\t%0,$23\n\tmfhc1\t%1,$23\n.set pop":"=r"(lval),"=r"(lval2)); break;
+       case 24: __asm__ __volatile__ (".set push\n.set hardfloat\nmfc1\t%0,$24\n\tmfhc1\t%1,$24\n.set pop":"=r"(lval),"=r"(lval2)); break;
+       case 25: __asm__ __volatile__ (".set push\n.set hardfloat\nmfc1\t%0,$25\n\tmfhc1\t%1,$25\n.set pop":"=r"(lval),"=r"(lval2)); break;
+       case 26: __asm__ __volatile__ (".set push\n.set hardfloat\nmfc1\t%0,$26\n\tmfhc1\t%1,$26\n.set pop":"=r"(lval),"=r"(lval2)); break;
+       case 27: __asm__ __volatile__ (".set push\n.set hardfloat\nmfc1\t%0,$27\n\tmfhc1\t%1,$27\n.set pop":"=r"(lval),"=r"(lval2)); break;
+       case 28: __asm__ __volatile__ (".set push\n.set hardfloat\nmfc1\t%0,$28\n\tmfhc1\t%1,$28\n.set pop":"=r"(lval),"=r"(lval2)); break;
+       case 29: __asm__ __volatile__ (".set push\n.set hardfloat\nmfc1\t%0,$29\n\tmfhc1\t%1,$29\n.set pop":"=r"(lval),"=r"(lval2)); break;
+       case 30: __asm__ __volatile__ (".set push\n.set hardfloat\nmfc1\t%0,$30\n\tmfhc1\t%1,$30\n.set pop":"=r"(lval),"=r"(lval2)); break;
+       case 31: __asm__ __volatile__ (".set push\n.set hardfloat\nmfc1\t%0,$31\n\tmfhc1\t%1,$31\n.set pop":"=r"(lval),"=r"(lval2)); break;
 #endif
        }
        *val = lval;
@@ -1404,40 +1404,40 @@ static inline void mtc1_pair(unsigned long val, unsigned long val2, unsigned reg
 {
        switch (reg & ~0x1) {
 #ifdef __BIG_ENDIAN
-       case 0:  __asm__ __volatile__ ("mtc1\t%0,$0\n\tmtc1\t%1,$1"::"r"(val2),"r"(val)); break;
-       case 2:  __asm__ __volatile__ ("mtc1\t%0,$2\n\tmtc1\t%1,$3"::"r"(val2),"r"(val)); break;
-       case 4:  __asm__ __volatile__ ("mtc1\t%0,$4\n\tmtc1\t%1,$5"::"r"(val2),"r"(val)); break;
-       case 6:  __asm__ __volatile__ ("mtc1\t%0,$6\n\tmtc1\t%1,$7"::"r"(val2),"r"(val)); break;
-       case 8:  __asm__ __volatile__ ("mtc1\t%0,$8\n\tmtc1\t%1,$9"::"r"(val2),"r"(val)); break;
-       case 10: __asm__ __volatile__ ("mtc1\t%0,$10\n\tmtc1\t%1,$11"::"r"(val2),"r"(val)); break;
-       case 12: __asm__ __volatile__ ("mtc1\t%0,$12\n\tmtc1\t%1,$13"::"r"(val2),"r"(val)); break;
-       case 14: __asm__ __volatile__ ("mtc1\t%0,$14\n\tmtc1\t%1,$15"::"r"(val2),"r"(val)); break;
-       case 16: __asm__ __volatile__ ("mtc1\t%0,$16\n\tmtc1\t%1,$17"::"r"(val2),"r"(val)); break;
-       case 18: __asm__ __volatile__ ("mtc1\t%0,$18\n\tmtc1\t%1,$19"::"r"(val2),"r"(val)); break;
-       case 20: __asm__ __volatile__ ("mtc1\t%0,$20\n\tmtc1\t%1,$21"::"r"(val2),"r"(val)); break;
-       case 22: __asm__ __volatile__ ("mtc1\t%0,$22\n\tmtc1\t%1,$23"::"r"(val2),"r"(val)); break;
-       case 24: __asm__ __volatile__ ("mtc1\t%0,$24\n\tmtc1\t%1,$25"::"r"(val2),"r"(val)); break;
-       case 26: __asm__ __volatile__ ("mtc1\t%0,$26\n\tmtc1\t%1,$27"::"r"(val2),"r"(val)); break;
-       case 28: __asm__ __volatile__ ("mtc1\t%0,$28\n\tmtc1\t%1,$29"::"r"(val2),"r"(val)); break;
-       case 30: __asm__ __volatile__ ("mtc1\t%0,$30\n\tmtc1\t%1,$31"::"r"(val2),"r"(val)); break;
+       case 0:  __asm__ __volatile__ (".set push\n.set hardfloat\nmtc1\t%0,$0\n\tmtc1\t%1,$1\n.set pop"::"r"(val2),"r"(val)); break;
+       case 2:  __asm__ __volatile__ (".set push\n.set hardfloat\nmtc1\t%0,$2\n\tmtc1\t%1,$3\n.set pop"::"r"(val2),"r"(val)); break;
+       case 4:  __asm__ __volatile__ (".set push\n.set hardfloat\nmtc1\t%0,$4\n\tmtc1\t%1,$5\n.set pop"::"r"(val2),"r"(val)); break;
+       case 6:  __asm__ __volatile__ (".set push\n.set hardfloat\nmtc1\t%0,$6\n\tmtc1\t%1,$7\n.set pop"::"r"(val2),"r"(val)); break;
+       case 8:  __asm__ __volatile__ (".set push\n.set hardfloat\nmtc1\t%0,$8\n\tmtc1\t%1,$9\n.set pop"::"r"(val2),"r"(val)); break;
+       case 10: __asm__ __volatile__ (".set push\n.set hardfloat\nmtc1\t%0,$10\n\tmtc1\t%1,$11\n.set pop"::"r"(val2),"r"(val)); break;
+       case 12: __asm__ __volatile__ (".set push\n.set hardfloat\nmtc1\t%0,$12\n\tmtc1\t%1,$13\n.set pop"::"r"(val2),"r"(val)); break;
+       case 14: __asm__ __volatile__ (".set push\n.set hardfloat\nmtc1\t%0,$14\n\tmtc1\t%1,$15\n.set pop"::"r"(val2),"r"(val)); break;
+       case 16: __asm__ __volatile__ (".set push\n.set hardfloat\nmtc1\t%0,$16\n\tmtc1\t%1,$17\n.set pop"::"r"(val2),"r"(val)); break;
+       case 18: __asm__ __volatile__ (".set push\n.set hardfloat\nmtc1\t%0,$18\n\tmtc1\t%1,$19\n.set pop"::"r"(val2),"r"(val)); break;
+       case 20: __asm__ __volatile__ (".set push\n.set hardfloat\nmtc1\t%0,$20\n\tmtc1\t%1,$21\n.set pop"::"r"(val2),"r"(val)); break;
+       case 22: __asm__ __volatile__ (".set push\n.set hardfloat\nmtc1\t%0,$22\n\tmtc1\t%1,$23\n.set pop"::"r"(val2),"r"(val)); break;
+       case 24: __asm__ __volatile__ (".set push\n.set hardfloat\nmtc1\t%0,$24\n\tmtc1\t%1,$25\n.set pop"::"r"(val2),"r"(val)); break;
+       case 26: __asm__ __volatile__ (".set push\n.set hardfloat\nmtc1\t%0,$26\n\tmtc1\t%1,$27\n.set pop"::"r"(val2),"r"(val)); break;
+       case 28: __asm__ __volatile__ (".set push\n.set hardfloat\nmtc1\t%0,$28\n\tmtc1\t%1,$29\n.set pop"::"r"(val2),"r"(val)); break;
+       case 30: __asm__ __volatile__ (".set push\n.set hardfloat\nmtc1\t%0,$30\n\tmtc1\t%1,$31\n.set pop"::"r"(val2),"r"(val)); break;
 #endif
 #ifdef __LITTLE_ENDIAN
-       case 0:  __asm__ __volatile__ ("mtc1\t%0,$0\n\tmtc1\t%1,$1"::"r"(val),"r"(val2)); break;
-       case 2:  __asm__ __volatile__ ("mtc1\t%0,$2\n\tmtc1\t%1,$3"::"r"(val),"r"(val2)); break;
-       case 4:  __asm__ __volatile__ ("mtc1\t%0,$4\n\tmtc1\t%1,$5"::"r"(val),"r"(val2)); break;
-       case 6:  __asm__ __volatile__ ("mtc1\t%0,$6\n\tmtc1\t%1,$7"::"r"(val),"r"(val2)); break;
-       case 8:  __asm__ __volatile__ ("mtc1\t%0,$8\n\tmtc1\t%1,$9"::"r"(val),"r"(val2)); break;
-       case 10: __asm__ __volatile__ ("mtc1\t%0,$10\n\tmtc1\t%1,$11"::"r"(val),"r"(val2)); break;
-       case 12: __asm__ __volatile__ ("mtc1\t%0,$12\n\tmtc1\t%1,$13"::"r"(val),"r"(val2)); break;
-       case 14: __asm__ __volatile__ ("mtc1\t%0,$14\n\tmtc1\t%1,$15"::"r"(val),"r"(val2)); break;
-       case 16: __asm__ __volatile__ ("mtc1\t%0,$16\n\tmtc1\t%1,$17"::"r"(val),"r"(val2)); break;
-       case 18: __asm__ __volatile__ ("mtc1\t%0,$18\n\tmtc1\t%1,$19"::"r"(val),"r"(val2)); break;
-       case 20: __asm__ __volatile__ ("mtc1\t%0,$20\n\tmtc1\t%1,$21"::"r"(val),"r"(val2)); break;
-       case 22: __asm__ __volatile__ ("mtc1\t%0,$22\n\tmtc1\t%1,$23"::"r"(val),"r"(val2)); break;
-       case 24: __asm__ __volatile__ ("mtc1\t%0,$24\n\tmtc1\t%1,$25"::"r"(val),"r"(val2)); break;
-       case 26: __asm__ __volatile__ ("mtc1\t%0,$26\n\tmtc1\t%1,$27"::"r"(val),"r"(val2)); break;
-       case 28: __asm__ __volatile__ ("mtc1\t%0,$28\n\tmtc1\t%1,$29"::"r"(val),"r"(val2)); break;
-       case 30: __asm__ __volatile__ ("mtc1\t%0,$30\n\tmtc1\t%1,$31"::"r"(val),"r"(val2)); break;
+       case 0:  __asm__ __volatile__ (".set push\n.set hardfloat\nmtc1\t%0,$0\n\tmtc1\t%1,$1\n.set pop"::"r"(val),"r"(val2)); break;
+       case 2:  __asm__ __volatile__ (".set push\n.set hardfloat\nmtc1\t%0,$2\n\tmtc1\t%1,$3\n.set pop"::"r"(val),"r"(val2)); break;
+       case 4:  __asm__ __volatile__ (".set push\n.set hardfloat\nmtc1\t%0,$4\n\tmtc1\t%1,$5\n.set pop"::"r"(val),"r"(val2)); break;
+       case 6:  __asm__ __volatile__ (".set push\n.set hardfloat\nmtc1\t%0,$6\n\tmtc1\t%1,$7\n.set pop"::"r"(val),"r"(val2)); break;
+       case 8:  __asm__ __volatile__ (".set push\n.set hardfloat\nmtc1\t%0,$8\n\tmtc1\t%1,$9\n.set pop"::"r"(val),"r"(val2)); break;
+       case 10: __asm__ __volatile__ (".set push\n.set hardfloat\nmtc1\t%0,$10\n\tmtc1\t%1,$11\n.set pop"::"r"(val),"r"(val2)); break;
+       case 12: __asm__ __volatile__ (".set push\n.set hardfloat\nmtc1\t%0,$12\n\tmtc1\t%1,$13\n.set pop"::"r"(val),"r"(val2)); break;
+       case 14: __asm__ __volatile__ (".set push\n.set hardfloat\nmtc1\t%0,$14\n\tmtc1\t%1,$15\n.set pop"::"r"(val),"r"(val2)); break;
+       case 16: __asm__ __volatile__ (".set push\n.set hardfloat\nmtc1\t%0,$16\n\tmtc1\t%1,$17\n.set pop"::"r"(val),"r"(val2)); break;
+       case 18: __asm__ __volatile__ (".set push\n.set hardfloat\nmtc1\t%0,$18\n\tmtc1\t%1,$19\n.set pop"::"r"(val),"r"(val2)); break;
+       case 20: __asm__ __volatile__ (".set push\n.set hardfloat\nmtc1\t%0,$20\n\tmtc1\t%1,$21\n.set pop"::"r"(val),"r"(val2)); break;
+       case 22: __asm__ __volatile__ (".set push\n.set hardfloat\nmtc1\t%0,$22\n\tmtc1\t%1,$23\n.set pop"::"r"(val),"r"(val2)); break;
+       case 24: __asm__ __volatile__ (".set push\n.set hardfloat\nmtc1\t%0,$24\n\tmtc1\t%1,$25\n.set pop"::"r"(val),"r"(val2)); break;
+       case 26: __asm__ __volatile__ (".set push\n.set hardfloat\nmtc1\t%0,$26\n\tmtc1\t%1,$27\n.set pop"::"r"(val),"r"(val2)); break;
+       case 28: __asm__ __volatile__ (".set push\n.set hardfloat\nmtc1\t%0,$28\n\tmtc1\t%1,$29\n.set pop"::"r"(val),"r"(val2)); break;
+       case 30: __asm__ __volatile__ (".set push\n.set hardfloat\nmtc1\t%0,$30\n\tmtc1\t%1,$31\n.set pop"::"r"(val),"r"(val2)); break;
 #endif
        }
 }
@@ -1448,40 +1448,40 @@ static inline void mfc1_pair(unsigned long *val, unsigned long *val2, unsigned r
 
        switch (reg & ~0x1) {
 #ifdef __BIG_ENDIAN
-       case 0:  __asm__ __volatile__ ("mfc1\t%0,$0\n\tmfc1\t%1,$1":"=r"(lval2),"=r"(lval)); break;
-       case 2:  __asm__ __volatile__ ("mfc1\t%0,$2\n\tmfc1\t%1,$3":"=r"(lval2),"=r"(lval)); break;
-       case 4:  __asm__ __volatile__ ("mfc1\t%0,$4\n\tmfc1\t%1,$5":"=r"(lval2),"=r"(lval)); break;
-       case 6:  __asm__ __volatile__ ("mfc1\t%0,$6\n\tmfc1\t%1,$7":"=r"(lval2),"=r"(lval)); break;
-       case 8:  __asm__ __volatile__ ("mfc1\t%0,$8\n\tmfc1\t%1,$9":"=r"(lval2),"=r"(lval)); break;
-       case 10: __asm__ __volatile__ ("mfc1\t%0,$10\n\tmfc1\t%1,$11":"=r"(lval2),"=r"(lval)); break;
-       case 12: __asm__ __volatile__ ("mfc1\t%0,$12\n\tmfc1\t%1,$13":"=r"(lval2),"=r"(lval)); break;
-       case 14: __asm__ __volatile__ ("mfc1\t%0,$14\n\tmfc1\t%1,$15":"=r"(lval2),"=r"(lval)); break;
-       case 16: __asm__ __volatile__ ("mfc1\t%0,$16\n\tmfc1\t%1,$17":"=r"(lval2),"=r"(lval)); break;
-       case 18: __asm__ __volatile__ ("mfc1\t%0,$18\n\tmfc1\t%1,$19":"=r"(lval2),"=r"(lval)); break;
-       case 20: __asm__ __volatile__ ("mfc1\t%0,$20\n\tmfc1\t%1,$21":"=r"(lval2),"=r"(lval)); break;
-       case 22: __asm__ __volatile__ ("mfc1\t%0,$22\n\tmfc1\t%1,$23":"=r"(lval2),"=r"(lval)); break;
-       case 24: __asm__ __volatile__ ("mfc1\t%0,$24\n\tmfc1\t%1,$25":"=r"(lval2),"=r"(lval)); break;
-       case 26: __asm__ __volatile__ ("mfc1\t%0,$26\n\tmfc1\t%1,$27":"=r"(lval2),"=r"(lval)); break;
-       case 28: __asm__ __volatile__ ("mfc1\t%0,$28\n\tmfc1\t%1,$29":"=r"(lval2),"=r"(lval)); break;
-       case 30: __asm__ __volatile__ ("mfc1\t%0,$30\n\tmfc1\t%1,$31":"=r"(lval2),"=r"(lval)); break;
+       case 0:  __asm__ __volatile__ (".set push\n.set hardfloat\nmfc1\t%0,$0\n\tmfc1\t%1,$1\n.set pop":"=r"(lval2),"=r"(lval)); break;
+       case 2:  __asm__ __volatile__ (".set push\n.set hardfloat\nmfc1\t%0,$2\n\tmfc1\t%1,$3\n.set pop":"=r"(lval2),"=r"(lval)); break;
+       case 4:  __asm__ __volatile__ (".set push\n.set hardfloat\nmfc1\t%0,$4\n\tmfc1\t%1,$5\n.set pop":"=r"(lval2),"=r"(lval)); break;
+       case 6:  __asm__ __volatile__ (".set push\n.set hardfloat\nmfc1\t%0,$6\n\tmfc1\t%1,$7\n.set pop":"=r"(lval2),"=r"(lval)); break;
+       case 8:  __asm__ __volatile__ (".set push\n.set hardfloat\nmfc1\t%0,$8\n\tmfc1\t%1,$9\n.set pop":"=r"(lval2),"=r"(lval)); break;
+       case 10: __asm__ __volatile__ (".set push\n.set hardfloat\nmfc1\t%0,$10\n\tmfc1\t%1,$11\n.set pop":"=r"(lval2),"=r"(lval)); break;
+       case 12: __asm__ __volatile__ (".set push\n.set hardfloat\nmfc1\t%0,$12\n\tmfc1\t%1,$13\n.set pop":"=r"(lval2),"=r"(lval)); break;
+       case 14: __asm__ __volatile__ (".set push\n.set hardfloat\nmfc1\t%0,$14\n\tmfc1\t%1,$15\n.set pop":"=r"(lval2),"=r"(lval)); break;
+       case 16: __asm__ __volatile__ (".set push\n.set hardfloat\nmfc1\t%0,$16\n\tmfc1\t%1,$17\n.set pop":"=r"(lval2),"=r"(lval)); break;
+       case 18: __asm__ __volatile__ (".set push\n.set hardfloat\nmfc1\t%0,$18\n\tmfc1\t%1,$19\n.set pop":"=r"(lval2),"=r"(lval)); break;
+       case 20: __asm__ __volatile__ (".set push\n.set hardfloat\nmfc1\t%0,$20\n\tmfc1\t%1,$21\n.set pop":"=r"(lval2),"=r"(lval)); break;
+       case 22: __asm__ __volatile__ (".set push\n.set hardfloat\nmfc1\t%0,$22\n\tmfc1\t%1,$23\n.set pop":"=r"(lval2),"=r"(lval)); break;
+       case 24: __asm__ __volatile__ (".set push\n.set hardfloat\nmfc1\t%0,$24\n\tmfc1\t%1,$25\n.set pop":"=r"(lval2),"=r"(lval)); break;
+       case 26: __asm__ __volatile__ (".set push\n.set hardfloat\nmfc1\t%0,$26\n\tmfc1\t%1,$27\n.set pop":"=r"(lval2),"=r"(lval)); break;
+       case 28: __asm__ __volatile__ (".set push\n.set hardfloat\nmfc1\t%0,$28\n\tmfc1\t%1,$29\n.set pop":"=r"(lval2),"=r"(lval)); break;
+       case 30: __asm__ __volatile__ (".set push\n.set hardfloat\nmfc1\t%0,$30\n\tmfc1\t%1,$31\n.set pop":"=r"(lval2),"=r"(lval)); break;
 #endif
 #ifdef __LITTLE_ENDIAN
-       case 0:  __asm__ __volatile__ ("mfc1\t%0,$0\n\tmfc1\t%1,$1":"=r"(lval),"=r"(lval2)); break;
-       case 2:  __asm__ __volatile__ ("mfc1\t%0,$2\n\tmfc1\t%1,$3":"=r"(lval),"=r"(lval2)); break;
-       case 4:  __asm__ __volatile__ ("mfc1\t%0,$4\n\tmfc1\t%1,$5":"=r"(lval),"=r"(lval2)); break;
-       case 6:  __asm__ __volatile__ ("mfc1\t%0,$6\n\tmfc1\t%1,$7":"=r"(lval),"=r"(lval2)); break;
-       case 8:  __asm__ __volatile__ ("mfc1\t%0,$8\n\tmfc1\t%1,$9":"=r"(lval),"=r"(lval2)); break;
-       case 10: __asm__ __volatile__ ("mfc1\t%0,$10\n\tmfc1\t%1,$11":"=r"(lval),"=r"(lval2)); break;
-       case 12: __asm__ __volatile__ ("mfc1\t%0,$12\n\tmfc1\t%1,$13":"=r"(lval),"=r"(lval2)); break;
-       case 14: __asm__ __volatile__ ("mfc1\t%0,$14\n\tmfc1\t%1,$15":"=r"(lval),"=r"(lval2)); break;
-       case 16: __asm__ __volatile__ ("mfc1\t%0,$16\n\tmfc1\t%1,$17":"=r"(lval),"=r"(lval2)); break;
-       case 18: __asm__ __volatile__ ("mfc1\t%0,$18\n\tmfc1\t%1,$19":"=r"(lval),"=r"(lval2)); break;
-       case 20: __asm__ __volatile__ ("mfc1\t%0,$20\n\tmfc1\t%1,$21":"=r"(lval),"=r"(lval2)); break;
-       case 22: __asm__ __volatile__ ("mfc1\t%0,$22\n\tmfc1\t%1,$23":"=r"(lval),"=r"(lval2)); break;
-       case 24: __asm__ __volatile__ ("mfc1\t%0,$24\n\tmfc1\t%1,$25":"=r"(lval),"=r"(lval2)); break;
-       case 26: __asm__ __volatile__ ("mfc1\t%0,$26\n\tmfc1\t%1,$27":"=r"(lval),"=r"(lval2)); break;
-       case 28: __asm__ __volatile__ ("mfc1\t%0,$28\n\tmfc1\t%1,$29":"=r"(lval),"=r"(lval2)); break;
-       case 30: __asm__ __volatile__ ("mfc1\t%0,$30\n\tmfc1\t%1,$31":"=r"(lval),"=r"(lval2)); break;
+       case 0:  __asm__ __volatile__ (".set push\n.set hardfloat\nmfc1\t%0,$0\n\tmfc1\t%1,$1\n.set pop":"=r"(lval),"=r"(lval2)); break;
+       case 2:  __asm__ __volatile__ (".set push\n.set hardfloat\nmfc1\t%0,$2\n\tmfc1\t%1,$3\n.set pop":"=r"(lval),"=r"(lval2)); break;
+       case 4:  __asm__ __volatile__ (".set push\n.set hardfloat\nmfc1\t%0,$4\n\tmfc1\t%1,$5\n.set pop":"=r"(lval),"=r"(lval2)); break;
+       case 6:  __asm__ __volatile__ (".set push\n.set hardfloat\nmfc1\t%0,$6\n\tmfc1\t%1,$7\n.set pop":"=r"(lval),"=r"(lval2)); break;
+       case 8:  __asm__ __volatile__ (".set push\n.set hardfloat\nmfc1\t%0,$8\n\tmfc1\t%1,$9\n.set pop":"=r"(lval),"=r"(lval2)); break;
+       case 10: __asm__ __volatile__ (".set push\n.set hardfloat\nmfc1\t%0,$10\n\tmfc1\t%1,$11\n.set pop":"=r"(lval),"=r"(lval2)); break;
+       case 12: __asm__ __volatile__ (".set push\n.set hardfloat\nmfc1\t%0,$12\n\tmfc1\t%1,$13\n.set pop":"=r"(lval),"=r"(lval2)); break;
+       case 14: __asm__ __volatile__ (".set push\n.set hardfloat\nmfc1\t%0,$14\n\tmfc1\t%1,$15\n.set pop":"=r"(lval),"=r"(lval2)); break;
+       case 16: __asm__ __volatile__ (".set push\n.set hardfloat\nmfc1\t%0,$16\n\tmfc1\t%1,$17\n.set pop":"=r"(lval),"=r"(lval2)); break;
+       case 18: __asm__ __volatile__ (".set push\n.set hardfloat\nmfc1\t%0,$18\n\tmfc1\t%1,$19\n.set pop":"=r"(lval),"=r"(lval2)); break;
+       case 20: __asm__ __volatile__ (".set push\n.set hardfloat\nmfc1\t%0,$20\n\tmfc1\t%1,$21\n.set pop":"=r"(lval),"=r"(lval2)); break;
+       case 22: __asm__ __volatile__ (".set push\n.set hardfloat\nmfc1\t%0,$22\n\tmfc1\t%1,$23\n.set pop":"=r"(lval),"=r"(lval2)); break;
+       case 24: __asm__ __volatile__ (".set push\n.set hardfloat\nmfc1\t%0,$24\n\tmfc1\t%1,$25\n.set pop":"=r"(lval),"=r"(lval2)); break;
+       case 26: __asm__ __volatile__ (".set push\n.set hardfloat\nmfc1\t%0,$26\n\tmfc1\t%1,$27\n.set pop":"=r"(lval),"=r"(lval2)); break;
+       case 28: __asm__ __volatile__ (".set push\n.set hardfloat\nmfc1\t%0,$28\n\tmfc1\t%1,$29\n.set pop":"=r"(lval),"=r"(lval2)); break;
+       case 30: __asm__ __volatile__ (".set push\n.set hardfloat\nmfc1\t%0,$30\n\tmfc1\t%1,$31\n.set pop":"=r"(lval),"=r"(lval2)); break;
 #endif
        }
        *val = lval;

diff --git a/arch/mips/math-emu/cp1emu.c b/arch/mips/math-emu/cp1emu.c
index de614414bd680dfb9be3ee596fc166070836d246..6cec30cd97e4ff39a848a644b9d6ea0072cb68ac 100644 (file)
--- a/arch/mips/math-emu/cp1emu.c
+++ b/arch/mips/math-emu/cp1emu.c
@@ -561,7 +561,7 @@ int mm_isBranchInstr(struct pt_regs *regs, struct mm_decoded_insn dec_insn,
                case mm_bc1t_op:
                        preempt_disable();
                        if (is_fpu_owner())
-                               asm volatile("cfc1\t%0,$31" : "=r" (fcr31));
+                               asm volatile(".set push\n.set hardfloat\ncfc1\t%0,$31\n.set pop" : "=r" (fcr31));
                        else
                                fcr31 = current->thread.fpu.fcr31;
                        preempt_enable();
@@ -978,7 +978,7 @@ static int isBranchInstr(struct pt_regs *regs, struct mm_decoded_insn dec_insn,
                if (insn.i_format.rs == rs_bc_op) {
                        preempt_disable();
                        if (is_fpu_owner())
-                               asm volatile("cfc1\t%0,$31" : "=r" (fcr31));
+                               asm volatile(".set push\n.set hardfloat\ncfc1\t%0,$31\n.set pop" : "=r" (fcr31));
                        else
                                fcr31 = current->thread.fpu.fcr31;
                        preempt_enable();