a prebuilt one from the
[Bootlin toolchain repository] (https://toolchains.bootlin.com/).
-Please note that only a 64bit version of the toolchain is available in
+Please note that only a 64-bit version of the toolchain is available in
the Bootlin toolchain repository for now.
Building and Installing the OpenSBI Platform-Independent Library
The *QEMU SiFive Unleashed Machine* platform does not have any platform specific
options.
-Executing on QEMU RISC-V 64bit
-------------------------------
+Executing on QEMU RISC-V 64-bit
+-------------------------------
**No Payload Case**
The *QEMU RISC-V Virt Machine* platform does not have any platform-specific
options.
-Execution on QEMU RISC-V 64bit
-------------------------------
+Execution on QEMU RISC-V 64-bit
+-------------------------------
**No Payload Case**
```
-Execution on QEMU RISC-V 32bit
-------------------------------
+Execution on QEMU RISC-V 32-bit
+-------------------------------
**No Payload Case**
*
* @param plat pointer to struct sbi_platform
*
- * @return 64bit timer value
+ * @return 64-bit timer value
*/
static inline u64 sbi_platform_timer_value(const struct sbi_platform *plat)
{
/* Under TileLink */
#define GPIOHS_BASE_ADDR (0x38001000U)
-/* Under AXI 64 bit */
+/* Under AXI 64-bit */
#define RAM_BASE_ADDR (0x80000000U)
#define RAM_SIZE (6 * 1024 * 1024U)
#define ROM_BASE_ADDR (0x88000000U)
#define ROM_SIZE (128 * 1024U)
-/* Under AHB 32 bit */
+/* Under AHB 32-bit */
#define DMAC_BASE_ADDR (0x50000000U)
-/* Under APB1 32 bit */
+/* Under APB1 32-bit */
#define GPIO_BASE_ADDR (0x50200000U)
#define UART1_BASE_ADDR (0x50210000U)
#define UART2_BASE_ADDR (0x50220000U)
#define TIMER1_BASE_ADDR (0x502E0000U)
#define TIMER2_BASE_ADDR (0x502F0000U)
-/* Under APB2 32 bit */
+/* Under APB2 32-bit */
#define WDT0_BASE_ADDR (0x50400000U)
#define WDT1_BASE_ADDR (0x50410000U)
#define OTP_BASE_ADDR (0x50420000U)
#define AES_BASE_ADDR (0x50450000U)
#define RTC_BASE_ADDR (0x50460000U)
-/* Under APB3 32 bit */
+/* Under APB3 32-bit */
#define SPI0_BASE_ADDR (0x52000000U)
#define SPI1_BASE_ADDR (0x53000000U)
#define SPI3_BASE_ADDR (0x54000000U)
# Setup platform list
case "${BUILD_RISCV_XLEN}" in
32)
- # Setup 32bit platform list
+ # Setup 32-bit platform list
BUILD_PLATFORM_SUBDIR=("qemu/virt")
BUILD_PLATFORM_SUBDIR+=("qemu/sifive_u")
;;
64)
- # Setup 64bit platform list
+ # Setup 64-bit platform list
BUILD_PLATFORM_SUBDIR=("qemu/virt")
BUILD_PLATFORM_SUBDIR+=("qemu/sifive_u")
BUILD_PLATFORM_SUBDIR+=("sifive/fu540")