pinctrl: rockchip: Remove redundant spaces
authorDavid Wu <david.wu@rock-chips.com>
Tue, 16 Apr 2019 13:50:54 +0000 (21:50 +0800)
committerKever Yang <kever.yang@rock-chips.com>
Wed, 8 May 2019 09:34:12 +0000 (17:34 +0800)
Some files have the redundant spaces, remove them.

Signed-off-by: David Wu <david.wu@rock-chips.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
drivers/pinctrl/rockchip/pinctrl-rk3036.c
drivers/pinctrl/rockchip/pinctrl-rk3188.c
drivers/pinctrl/rockchip/pinctrl-rk322x.c
drivers/pinctrl/rockchip/pinctrl-rk3288.c
drivers/pinctrl/rockchip/pinctrl-rk3328.c
drivers/pinctrl/rockchip/pinctrl-rk3368.c
drivers/pinctrl/rockchip/pinctrl-rk3399.c

index 2729b03..2a651cd 100644 (file)
@@ -36,12 +36,12 @@ static struct rockchip_pin_bank rk3036_pin_banks[] = {
 };
 
 static struct rockchip_pin_ctrl rk3036_pin_ctrl = {
-               .pin_banks              = rk3036_pin_banks,
-               .nr_banks               = ARRAY_SIZE(rk3036_pin_banks),
-               .label                  = "RK3036-GPIO",
-               .type                   = RK3036,
-               .grf_mux_offset         = 0xa8,
-               .pull_calc_reg          = rk3036_calc_pull_reg_and_bit,
+       .pin_banks              = rk3036_pin_banks,
+       .nr_banks               = ARRAY_SIZE(rk3036_pin_banks),
+       .label                  = "RK3036-GPIO",
+       .type                   = RK3036,
+       .grf_mux_offset         = 0xa8,
+       .pull_calc_reg          = rk3036_calc_pull_reg_and_bit,
 };
 
 static const struct udevice_id rk3036_pinctrl_ids[] = {
index 5ed9aec..7cc52c0 100644 (file)
@@ -55,12 +55,12 @@ static struct rockchip_pin_bank rk3188_pin_banks[] = {
 };
 
 static struct rockchip_pin_ctrl rk3188_pin_ctrl = {
-               .pin_banks              = rk3188_pin_banks,
-               .nr_banks               = ARRAY_SIZE(rk3188_pin_banks),
-               .label                  = "RK3188-GPIO",
-               .type                   = RK3188,
-               .grf_mux_offset         = 0x60,
-               .pull_calc_reg          = rk3188_calc_pull_reg_and_bit,
+       .pin_banks              = rk3188_pin_banks,
+       .nr_banks               = ARRAY_SIZE(rk3188_pin_banks),
+       .label                  = "RK3188-GPIO",
+       .type                   = RK3188,
+       .grf_mux_offset         = 0x60,
+       .pull_calc_reg          = rk3188_calc_pull_reg_and_bit,
 };
 
 static const struct udevice_id rk3188_pinctrl_ids[] = {
index d2a6cd7..d67b48a 100644 (file)
@@ -183,15 +183,15 @@ static struct rockchip_pin_bank rk3228_pin_banks[] = {
 };
 
 static struct rockchip_pin_ctrl rk3228_pin_ctrl = {
-               .pin_banks              = rk3228_pin_banks,
-               .nr_banks               = ARRAY_SIZE(rk3228_pin_banks),
-               .label                  = "RK3228-GPIO",
-               .type                   = RK3288,
-               .grf_mux_offset         = 0x0,
-               .iomux_routes           = rk3228_mux_route_data,
-               .niomux_routes          = ARRAY_SIZE(rk3228_mux_route_data),
-               .pull_calc_reg          = rk3228_calc_pull_reg_and_bit,
-               .drv_calc_reg           = rk3228_calc_drv_reg_and_bit,
+       .pin_banks              = rk3228_pin_banks,
+       .nr_banks               = ARRAY_SIZE(rk3228_pin_banks),
+       .label                  = "RK3228-GPIO",
+       .type                   = RK3288,
+       .grf_mux_offset         = 0x0,
+       .iomux_routes           = rk3228_mux_route_data,
+       .niomux_routes          = ARRAY_SIZE(rk3228_mux_route_data),
+       .pull_calc_reg          = rk3228_calc_pull_reg_and_bit,
+       .drv_calc_reg           = rk3228_calc_drv_reg_and_bit,
 };
 
 static const struct udevice_id rk3228_pinctrl_ids[] = {
index 60585f3..3648f37 100644 (file)
@@ -124,16 +124,16 @@ static struct rockchip_pin_bank rk3288_pin_banks[] = {
 };
 
 static struct rockchip_pin_ctrl rk3288_pin_ctrl = {
-               .pin_banks              = rk3288_pin_banks,
-               .nr_banks               = ARRAY_SIZE(rk3288_pin_banks),
-               .label                  = "RK3288-GPIO",
-               .type                   = RK3288,
-               .grf_mux_offset         = 0x0,
-               .pmu_mux_offset         = 0x84,
-               .iomux_routes           = rk3288_mux_route_data,
-               .niomux_routes          = ARRAY_SIZE(rk3288_mux_route_data),
-               .pull_calc_reg          = rk3288_calc_pull_reg_and_bit,
-               .drv_calc_reg           = rk3288_calc_drv_reg_and_bit,
+       .pin_banks              = rk3288_pin_banks,
+       .nr_banks               = ARRAY_SIZE(rk3288_pin_banks),
+       .label                  = "RK3288-GPIO",
+       .type                   = RK3288,
+       .grf_mux_offset         = 0x0,
+       .pmu_mux_offset         = 0x84,
+       .iomux_routes           = rk3288_mux_route_data,
+       .niomux_routes          = ARRAY_SIZE(rk3288_mux_route_data),
+       .pull_calc_reg          = rk3288_calc_pull_reg_and_bit,
+       .drv_calc_reg           = rk3288_calc_drv_reg_and_bit,
 };
 
 static const struct udevice_id rk3288_pinctrl_ids[] = {
index f1b3d10..ab634c1 100644 (file)
@@ -192,18 +192,18 @@ static struct rockchip_pin_bank rk3328_pin_banks[] = {
 };
 
 static struct rockchip_pin_ctrl rk3328_pin_ctrl = {
-               .pin_banks              = rk3328_pin_banks,
-               .nr_banks               = ARRAY_SIZE(rk3328_pin_banks),
-               .label                  = "RK3328-GPIO",
-               .type                   = RK3288,
-               .grf_mux_offset         = 0x0,
-               .iomux_recalced         = rk3328_mux_recalced_data,
-               .niomux_recalced        = ARRAY_SIZE(rk3328_mux_recalced_data),
-               .iomux_routes           = rk3328_mux_route_data,
-               .niomux_routes          = ARRAY_SIZE(rk3328_mux_route_data),
-               .pull_calc_reg          = rk3328_calc_pull_reg_and_bit,
-               .drv_calc_reg           = rk3328_calc_drv_reg_and_bit,
-               .schmitt_calc_reg       = rk3328_calc_schmitt_reg_and_bit,
+       .pin_banks              = rk3328_pin_banks,
+       .nr_banks               = ARRAY_SIZE(rk3328_pin_banks),
+       .label                  = "RK3328-GPIO",
+       .type                   = RK3288,
+       .grf_mux_offset         = 0x0,
+       .iomux_recalced         = rk3328_mux_recalced_data,
+       .niomux_recalced        = ARRAY_SIZE(rk3328_mux_recalced_data),
+       .iomux_routes           = rk3328_mux_route_data,
+       .niomux_routes          = ARRAY_SIZE(rk3328_mux_route_data),
+       .pull_calc_reg          = rk3328_calc_pull_reg_and_bit,
+       .drv_calc_reg           = rk3328_calc_drv_reg_and_bit,
+       .schmitt_calc_reg       = rk3328_calc_schmitt_reg_and_bit,
 };
 
 static const struct udevice_id rk3328_pinctrl_ids[] = {
index f5cd6ff..8bdaf5e 100644 (file)
@@ -85,14 +85,14 @@ static struct rockchip_pin_bank rk3368_pin_banks[] = {
 };
 
 static struct rockchip_pin_ctrl rk3368_pin_ctrl = {
-               .pin_banks              = rk3368_pin_banks,
-               .nr_banks               = ARRAY_SIZE(rk3368_pin_banks),
-               .label                  = "RK3368-GPIO",
-               .type                   = RK3368,
-               .grf_mux_offset         = 0x0,
-               .pmu_mux_offset         = 0x0,
-               .pull_calc_reg          = rk3368_calc_pull_reg_and_bit,
-               .drv_calc_reg           = rk3368_calc_drv_reg_and_bit,
+       .pin_banks              = rk3368_pin_banks,
+       .nr_banks               = ARRAY_SIZE(rk3368_pin_banks),
+       .label                  = "RK3368-GPIO",
+       .type                   = RK3368,
+       .grf_mux_offset         = 0x0,
+       .pmu_mux_offset         = 0x0,
+       .pull_calc_reg          = rk3368_calc_pull_reg_and_bit,
+       .drv_calc_reg           = rk3368_calc_drv_reg_and_bit,
 };
 
 static const struct udevice_id rk3368_pinctrl_ids[] = {
index c5aab64..06276b1 100644 (file)
@@ -158,18 +158,18 @@ static struct rockchip_pin_bank rk3399_pin_banks[] = {
 };
 
 static struct rockchip_pin_ctrl rk3399_pin_ctrl = {
-               .pin_banks              = rk3399_pin_banks,
-               .nr_banks               = ARRAY_SIZE(rk3399_pin_banks),
-               .label                  = "RK3399-GPIO",
-               .type                   = RK3399,
-               .grf_mux_offset         = 0xe000,
-               .pmu_mux_offset         = 0x0,
-               .grf_drv_offset         = 0xe100,
-               .pmu_drv_offset         = 0x80,
-               .iomux_routes           = rk3399_mux_route_data,
-               .niomux_routes          = ARRAY_SIZE(rk3399_mux_route_data),
-               .pull_calc_reg          = rk3399_calc_pull_reg_and_bit,
-               .drv_calc_reg           = rk3399_calc_drv_reg_and_bit,
+       .pin_banks              = rk3399_pin_banks,
+       .nr_banks               = ARRAY_SIZE(rk3399_pin_banks),
+       .label                  = "RK3399-GPIO",
+       .type                   = RK3399,
+       .grf_mux_offset         = 0xe000,
+       .pmu_mux_offset         = 0x0,
+       .grf_drv_offset         = 0xe100,
+       .pmu_drv_offset         = 0x80,
+       .iomux_routes           = rk3399_mux_route_data,
+       .niomux_routes          = ARRAY_SIZE(rk3399_mux_route_data),
+       .pull_calc_reg          = rk3399_calc_pull_reg_and_bit,
+       .drv_calc_reg           = rk3399_calc_drv_reg_and_bit,
 };
 
 static const struct udevice_id rk3399_pinctrl_ids[] = {