re PR target/28232 (Wrong aligned load is generated with -m4a on sh-*)

	PR target/28232
	* config/sh/sh.c (expand_block_move): Use a BLKmode rather than
	SImode memory reference for the source of a movua.
	* config/sh/sh.md (UNSPEC_MOVUA): New macro.
	(movua): Use an unspec instead of sign_extract.  Expect the source
	to have mode BLKmode.
	(extv, insv): Use a BLKmode rather than SImode memory reference
	for the source of a movua.

Co-Authored-By: Kaz Kojima <kkojima@gcc.gnu.org>
From-SVN: r117961

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 85fde5d..3288755 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,15 @@
+2006-10-22  Richard Sandiford  <richard@codesourcery.com>
+           Kaz Kojima  <kkojima@gcc.gnu.org>
+
+       PR target/28232
+       * config/sh/sh.c (expand_block_move): Use a BLKmode rather than
+       SImode memory reference for the source of a movua.
+       * config/sh/sh.md (UNSPEC_MOVUA): New macro.
+       (movua): Use an unspec instead of sign_extract.  Expect the source
+       to have mode BLKmode.
+       (extv, insv): Use a BLKmode rather than SImode memory reference
+       for the source of a movua.
+
 2006-10-22  Jeff Law  <law@redhat.com>
        Richard Guenther  <rguenther@suse.de>
 

diff --git a/gcc/config/sh/sh.c b/gcc/config/sh/sh.c
index 15eae4c..65b2daa 100644 (file)
--- a/gcc/config/sh/sh.c
+++ b/gcc/config/sh/sh.c
@@ -1074,8 +1074,10 @@ expand_block_move (rtx *operands)
       while (copied + 4 <= bytes)
        {
          rtx to = adjust_address (dest, SImode, copied);
-         rtx from = adjust_automodify_address (src, SImode, src_addr, copied);
+         rtx from = adjust_automodify_address (src, BLKmode,
+                                               src_addr, copied);
 
+         set_mem_size (from, GEN_INT (4));
          emit_insn (gen_movua (temp, from));
          emit_move_insn (src_addr, plus_constant (src_addr, 4));
          emit_move_insn (to, temp);

diff --git a/gcc/config/sh/sh.md b/gcc/config/sh/sh.md
index 9522af7..ca112ef 100644 (file)
--- a/gcc/config/sh/sh.md
+++ b/gcc/config/sh/sh.md
@@ -153,6 +153,7 @@
   (UNSPEC_THUNK                36)
   (UNSPEC_SP_SET       40)
   (UNSPEC_SP_TEST      41)
+  (UNSPEC_MOVUA                42)
 
   ;; These are used with unspec_volatile.
   (UNSPECV_BLOCKAGE    0)
@@ -11147,8 +11148,8 @@ mov.l\\t1f,r0\\n\\
 
 (define_insn "movua"
   [(set (match_operand:SI 0 "register_operand" "=z")
-       (sign_extract:SI (match_operand:SI 1 "unaligned_load_operand" "Sua>")
-                        (const_int 32) (const_int 0)))]
+       (unspec:SI [(match_operand:BLK 1 "unaligned_load_operand" "Sua>")]
+                  UNSPEC_MOVUA))]
   "TARGET_SH4A_ARCH"
   "movua.l     %1,%0"
   [(set_attr "type" "movua")])
@@ -11181,8 +11182,9 @@ mov.l\\t1f,r0\\n\\
       && INTVAL (operands[3]) == -24 * (BITS_BIG_ENDIAN != BYTES_BIG_ENDIAN)
       && GET_CODE (operands[1]) == MEM && MEM_ALIGN (operands[1]) < 32)
     {
-      emit_insn (gen_movua (operands[0],
-                           adjust_address (operands[1], SImode, 0)));
+      rtx src = adjust_address (operands[1], BLKmode, 0);
+      set_mem_size (src, GEN_INT (4));
+      emit_insn (gen_movua (operands[0], src));
       DONE;
     }
 
@@ -11201,8 +11203,9 @@ mov.l\\t1f,r0\\n\\
       && INTVAL (operands[3]) == -24 * (BITS_BIG_ENDIAN != BYTES_BIG_ENDIAN)
       && GET_CODE (operands[1]) == MEM && MEM_ALIGN (operands[1]) < 32)
     {
-      emit_insn (gen_movua (operands[0],
-                           adjust_address (operands[1], SImode, 0)));
+      rtx src = adjust_address (operands[1], BLKmode, 0);
+      set_mem_size (src, GEN_INT (4));
+      emit_insn (gen_movua (operands[0], src));
       DONE;
     }