mpc83xx: restrict UTMI PHY configuration to 831x parts
authorKim Phillips <kim.phillips@freescale.com>
Fri, 1 Apr 2011 21:53:18 +0000 (16:53 -0500)
committerKim Phillips <kim.phillips@freescale.com>
Tue, 5 Apr 2011 01:23:20 +0000 (20:23 -0500)
i.e, to those parts that have PHY_CLK_VALID bits in their USB
CONTROL registers:

mpc8308  WU_INT, PHY_CLK_SEL, USB_EN, WU_INT_EN, ULPI_INT_EN
mpc831x  PHY_CLK_VALID, WU_INT, CLKIN_SEL, PHY_CLK_SEL, UTMI_PHY_EN,
 PLL_RESET, REFSEL, OTG_PORT, KEEP_OTG_ON, LSF_EN, USB_EN,
 ULPI_INT_EN
mpc834x  USB_EN, ULPI_INT1_EN (MPH only), ULPI_INT0_EN
mpc837x  USB_EN, ULPI_INT_EN

(mpc832x, mpc8360 don't have a USB_EHCI_FSL compatible controller)

this prevents non-831x parts from never completing cpu_init_f(),
because the (non-existent) PHY_CLK_VALID bit never gets set.

Reported-by: Andre Schwarz <andre.schwarz@matrix-vision.de>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Tested-by: Andre Schwarz <andre.schwarz@matrix-vision.de>
arch/powerpc/cpu/mpc83xx/cpu_init.c

index 7a1cae7..76afba5 100644 (file)
@@ -326,8 +326,7 @@ void cpu_init_f (volatile immap_t * im)
        im->gpio[1].dat = CONFIG_SYS_GPIO2_DAT;
        im->gpio[1].dir = CONFIG_SYS_GPIO2_DIR;
 #endif
-#ifdef CONFIG_USB_EHCI_FSL
-#ifndef CONFIG_MPC834x
+#if defined(CONFIG_USB_EHCI_FSL) && defined(CONFIG_MPC831x)
        uint32_t temp;
        struct usb_ehci *ehci = (struct usb_ehci *)CONFIG_SYS_FSL_USB_ADDR;
 
@@ -340,7 +339,6 @@ void cpu_init_f (volatile immap_t * im)
                udelay(1000);
        } while (!(temp & PHY_CLK_VALID));
 #endif
-#endif
 }
 
 int cpu_init_r (void)