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RDMA/mlx5: Fix the flow of a miss in the allocation of a cache ODP MR
author
Aharon Landau
<aharonl@nvidia.com>
Tue, 15 Feb 2022 17:55:30 +0000
(19:55 +0200)
committer
Greg Kroah-Hartman
<gregkh@linuxfoundation.org>
Fri, 8 Apr 2022 12:23:34 +0000
(14:23 +0200)
[ Upstream commit
2f0e60d5e9f96341a0c8a01be8878cdb3b29ff20
]
When an ODP MR cache entry is empty and trying to allocate it, increment
the ent->miss counter and call to queue_adjust_cache_locked() to verify
the entry is balanced.
Fixes: aad719dcf379 ("RDMA/mlx5: Allow MRs to be created in the cache synchronously")
Link:
https://lore.kernel.org/r/09503e295276dcacc92cb1d8aef1ad0961c99dc1.1644947594.git.leonro@nvidia.com
Signed-off-by: Aharon Landau <aharonl@nvidia.com>
Signed-off-by: Leon Romanovsky <leonro@nvidia.com>
Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
drivers/infiniband/hw/mlx5/mr.c
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diff --git
a/drivers/infiniband/hw/mlx5/mr.c
b/drivers/infiniband/hw/mlx5/mr.c
index 22e2f4d79743d198c780475381bc16f8bf1c4a54..7bb1b9d0941c52dce7de9aeb68a36090f0c0f63c 100644
(file)
--- a/
drivers/infiniband/hw/mlx5/mr.c
+++ b/
drivers/infiniband/hw/mlx5/mr.c
@@
-580,6
+580,8
@@
struct mlx5_ib_mr *mlx5_mr_cache_alloc(struct mlx5_ib_dev *dev,
ent = &cache->ent[entry];
spin_lock_irq(&ent->lock);
if (list_empty(&ent->head)) {
+ queue_adjust_cache_locked(ent);
+ ent->miss++;
spin_unlock_irq(&ent->lock);
mr = create_cache_mr(ent);
if (IS_ERR(mr))