drm/amd/powerplay: enable mmhub pg
authorKenneth Feng <kenneth.feng@amd.com>
Fri, 27 Mar 2020 04:23:14 +0000 (12:23 +0800)
committerAlex Deucher <alexander.deucher@amd.com>
Wed, 1 Jul 2020 05:59:11 +0000 (01:59 -0400)
mmhub pg can be obvserved from PCTL_CTRL

Signed-off-by: Kenneth Feng <kenneth.feng@amd.com>
Reviewed-by: Likun Gao <Likun.Gao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/nv.c
drivers/gpu/drm/amd/powerplay/sienna_cichlid_ppt.c

index 6ca4c6f..936950f 100644 (file)
@@ -704,7 +704,8 @@ static int nv_common_early_init(void *handle)
                adev->pg_flags = AMD_PG_SUPPORT_VCN |
                        AMD_PG_SUPPORT_VCN_DPG |
                        AMD_PG_SUPPORT_JPEG |
-                       AMD_PG_SUPPORT_ATHUB;
+                       AMD_PG_SUPPORT_ATHUB |
+                       AMD_PG_SUPPORT_MMHUB;
                /* guest vm gets 0xffffffff when reading RCC_DEV0_EPF0_STRAP0,
                 * as a consequence, the rev_id and external_rev_id are wrong.
                 * workaround it by hardcoding rev_id to 0 (default value).
index f7e67c4..8fb08ca 100644 (file)
@@ -335,6 +335,9 @@ sienna_cichlid_get_allowed_feature_mask(struct smu_context *smu,
        if (smu->adev->pg_flags & AMD_PG_SUPPORT_ATHUB)
                *(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_ATHUB_PG_BIT);
 
+       if (smu->adev->pg_flags & AMD_PG_SUPPORT_MMHUB)
+               *(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_MMHUB_PG_BIT);
+
        if (smu->adev->pg_flags & AMD_PG_SUPPORT_VCN ||
            smu->adev->pg_flags & AMD_PG_SUPPORT_JPEG)
                *(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_MM_DPM_PG_BIT);