drm/i915: Introduce for_each_dbuf_slice_in_mask macro
authorStanislav Lisovskiy <stanislav.lisovskiy@intel.com>
Tue, 19 May 2020 13:11:15 +0000 (16:11 +0300)
committerManasi Navare <manasi.d.navare@intel.com>
Thu, 21 May 2020 21:14:56 +0000 (14:14 -0700)
We quite often need now to iterate only particular dbuf slices
in mask, whether they are active or related to particular crtc.

v2: - Minor code refactoring
v3: - Use enum for max slices instead of macro

Let's make our life a bit easier and use a macro for that.

Reviewed-by: Manasi Navare <manasi.d.navare@intel.com>
Signed-off-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20200519131117.17190-6-stanislav.lisovskiy@intel.com
drivers/gpu/drm/i915/display/intel_display.h
drivers/gpu/drm/i915/display/intel_display_power.h

index efb4da2..b7a6d56 100644 (file)
@@ -187,6 +187,13 @@ enum plane_id {
        for ((__p) = PLANE_PRIMARY; (__p) < I915_MAX_PLANES; (__p)++) \
                for_each_if((__crtc)->plane_ids_mask & BIT(__p))
 
+#define for_each_dbuf_slice_in_mask(__slice, __mask) \
+       for ((__slice) = DBUF_S1; (__slice) < I915_MAX_DBUF_SLICES; (__slice)++) \
+               for_each_if((BIT(__slice)) & (__mask))
+
+#define for_each_dbuf_slice(__slice) \
+       for_each_dbuf_slice_in_mask(__slice, BIT(I915_MAX_DBUF_SLICES) - 1)
+
 enum port {
        PORT_NONE = -1,
 
index dc766af..54c20c7 100644 (file)
@@ -314,6 +314,7 @@ intel_display_power_put_async(struct drm_i915_private *i915,
 enum dbuf_slice {
        DBUF_S1,
        DBUF_S2,
+       I915_MAX_DBUF_SLICES
 };
 
 void gen9_dbuf_slices_update(struct drm_i915_private *dev_priv,