#define SX9324_REG_CLK_SPRD 0x15
#define SX9324_REG_AFE_CTRL0 0x20
+#define SX9324_REG_AFE_CTRL0_RINT_SHIFT 6
+#define SX9324_REG_AFE_CTRL0_RINT_MASK \
+ GENMASK(SX9324_REG_AFE_CTRL0_RINT_SHIFT + 1, \
+ SX9324_REG_AFE_CTRL0_RINT_SHIFT)
+#define SX9324_REG_AFE_CTRL0_RINT_LOWEST 0x00
#define SX9324_REG_AFE_CTRL1 0x21
#define SX9324_REG_AFE_CTRL2 0x22
#define SX9324_REG_AFE_CTRL3 0x23
*/
{ SX9324_REG_GNRL_CTRL1, SX9324_REG_GNRL_CTRL1_PAUSECTRL },
- { SX9324_REG_AFE_CTRL0, 0x00 },
+ { SX9324_REG_AFE_CTRL0, SX9324_REG_AFE_CTRL0_RINT_LOWEST },
{ SX9324_REG_AFE_CTRL3, 0x00 },
{ SX9324_REG_AFE_CTRL4, SX9324_REG_AFE_CTRL4_FREQ_83_33HZ |
SX9324_REG_AFE_CTRL4_RES_100 },
sx9324_get_default_reg(struct device *dev, int idx,
struct sx_common_reg_default *reg_def)
{
+ static const char * const sx9324_rints[] = { "lowest", "low", "high",
+ "highest" };
#define SX9324_PIN_DEF "semtech,ph0-pin"
#define SX9324_RESOLUTION_DEF "semtech,ph01-resolution"
#define SX9324_PROXRAW_DEF "semtech,ph01-proxraw-strength"
char prop[] = SX9324_PROXRAW_DEF;
u32 start = 0, raw = 0, pos = 0;
int ret, count, ph, pin;
+ const char *res;
memcpy(reg_def, &sx9324_default_regs[idx], sizeof(*reg_def));
switch (reg_def->reg) {
SX9324_REG_AFE_PH0_PIN_MASK(pin);
reg_def->def = raw;
break;
+ case SX9324_REG_AFE_CTRL0:
+ ret = device_property_read_string(dev,
+ "semtech,int-comp-resistor", &res);
+ if (ret)
+ break;
+ ret = match_string(sx9324_rints, ARRAY_SIZE(sx9324_rints), res);
+ if (ret < 0)
+ break;
+ reg_def->def &= ~SX9324_REG_AFE_CTRL0_RINT_MASK;
+ reg_def->def |= ret << SX9324_REG_AFE_CTRL0_RINT_SHIFT;
+ break;
case SX9324_REG_AFE_CTRL4:
case SX9324_REG_AFE_CTRL7:
if (reg_def->reg == SX9324_REG_AFE_CTRL4)