arm64: dts: qcom: sm6125: Reorder HSUSB PHY clocks to match bindings
authorMarijn Suijten <marijn.suijten@somainline.org>
Fri, 16 Dec 2022 21:33:43 +0000 (22:33 +0100)
committerBjorn Andersson <andersson@kernel.org>
Thu, 29 Dec 2022 17:06:21 +0000 (11:06 -0600)
Reorder the clocks and corresponding names to match the QUSB2 phy
schema, fixing the following CHECK_DTBS errors:

    arch/arm64/boot/dts/qcom/sm6125-sony-xperia-seine-pdx201.dtb: phy@1613000: clock-names:0: 'cfg_ahb' was expected
            From schema: /newdata/aosp-r/kernel/mainline/kernel/Documentation/devicetree/bindings/phy/qcom,qusb2-phy.yaml
    arch/arm64/boot/dts/qcom/sm6125-sony-xperia-seine-pdx201.dtb: phy@1613000: clock-names:1: 'ref' was expected
            From schema: /newdata/aosp-r/kernel/mainline/kernel/Documentation/devicetree/bindings/phy/qcom,qusb2-phy.yaml

Fixes: cff4bbaf2a2d ("arm64: dts: qcom: Add support for SM6125")
Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org>
Reviewed-by: Martin Botka <martin.botka@somainline.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221216213343.1140143-1-marijn.suijten@somainline.org
arch/arm64/boot/dts/qcom/sm6125.dtsi

index fa102ba..933041a 100644 (file)
                        reg = <0x01613000 0x180>;
                        #phy-cells = <0>;
 
-                       clocks = <&rpmcc RPM_SMD_XO_CLK_SRC>,
-                                <&gcc GCC_AHB2PHY_USB_CLK>;
-                       clock-names = "ref", "cfg_ahb";
+                       clocks = <&gcc GCC_AHB2PHY_USB_CLK>,
+                                <&rpmcc RPM_SMD_XO_CLK_SRC>;
+                       clock-names = "cfg_ahb", "ref";
 
                        resets = <&gcc GCC_QUSB2PHY_PRIM_BCR>;
                        status = "disabled";