r600/uvd: disable UVD tiling by default

It has only minimal advantages for post processing and doesn't work with VCE.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/src/gallium/drivers/r600/r600_uvd.c b/src/gallium/drivers/r600/r600_uvd.c
index 357e901..3a94a5a 100644 (file)
--- a/src/gallium/drivers/r600/r600_uvd.c
+++ b/src/gallium/drivers/r600/r600_uvd.c
@@ -49,6 +49,8 @@
 #include "radeon/radeon_uvd.h"
 #include "r600d.h"
 
+#define R600_UVD_ENABLE_TILING 0
+
 /**
  * creates an video buffer with an UVD compatible memory layout
  */
@@ -77,7 +79,7 @@ struct pipe_video_buffer *r600_video_buffer_create(struct pipe_context *pipe,
        template.height = align(tmpl->height / array_size, VL_MACROBLOCK_HEIGHT);
 
        vl_video_buffer_template(&templ, &template, resource_formats[0], 1, array_size, PIPE_USAGE_DEFAULT, 0);
-       if (ctx->b.chip_class < EVERGREEN || tmpl->interlaced)
+       if (ctx->b.chip_class < EVERGREEN || tmpl->interlaced || !R600_UVD_ENABLE_TILING)
                templ.bind = PIPE_BIND_LINEAR;
        resources[0] = (struct r600_texture *)
                pipe->screen->resource_create(pipe->screen, &templ);
@@ -86,7 +88,7 @@ struct pipe_video_buffer *r600_video_buffer_create(struct pipe_context *pipe,
 
        if (resource_formats[1] != PIPE_FORMAT_NONE) {
                vl_video_buffer_template(&templ, &template, resource_formats[1], 1, array_size, PIPE_USAGE_DEFAULT, 1);
-               if (ctx->b.chip_class < EVERGREEN || tmpl->interlaced)
+               if (ctx->b.chip_class < EVERGREEN || tmpl->interlaced || !R600_UVD_ENABLE_TILING)
                        templ.bind = PIPE_BIND_LINEAR;
                resources[1] = (struct r600_texture *)
                        pipe->screen->resource_create(pipe->screen, &templ);
@@ -96,7 +98,7 @@ struct pipe_video_buffer *r600_video_buffer_create(struct pipe_context *pipe,
 
        if (resource_formats[2] != PIPE_FORMAT_NONE) {
                vl_video_buffer_template(&templ, &template, resource_formats[2], 1, array_size, PIPE_USAGE_DEFAULT, 2);
-               if (ctx->b.chip_class < EVERGREEN || tmpl->interlaced)
+               if (ctx->b.chip_class < EVERGREEN || tmpl->interlaced || !R600_UVD_ENABLE_TILING)
                        templ.bind = PIPE_BIND_LINEAR;
                resources[2] = (struct r600_texture *)
                        pipe->screen->resource_create(pipe->screen, &templ);