dt-bindings: clock: qcom,sdm845-lpasscc: convert to dtschema
authorKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Fri, 4 Nov 2022 18:21:08 +0000 (14:21 -0400)
committerBjorn Andersson <andersson@kernel.org>
Sun, 6 Nov 2022 04:21:17 +0000 (23:21 -0500)
Convert Qualcomm SDM845 LPASS clock controller bindings to DT schema.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221104182108.126515-1-krzysztof.kozlowski@linaro.org
Documentation/devicetree/bindings/clock/qcom,lpasscc.txt [deleted file]
Documentation/devicetree/bindings/clock/qcom,sdm845-lpasscc.yaml [new file with mode: 0644]

diff --git a/Documentation/devicetree/bindings/clock/qcom,lpasscc.txt b/Documentation/devicetree/bindings/clock/qcom,lpasscc.txt
deleted file mode 100644 (file)
index b9e9787..0000000
+++ /dev/null
@@ -1,26 +0,0 @@
-Qualcomm LPASS Clock Controller Binding
------------------------------------------------
-
-Required properties :
-- compatible           : shall contain "qcom,sdm845-lpasscc"
-- #clock-cells         : from common clock binding, shall contain 1.
-- reg                  : shall contain base register address and size,
-                         in the order
-                       Index-0 maps to LPASS_CC register region
-                       Index-1 maps to LPASS_QDSP6SS register region
-
-Optional properties :
-- reg-names    : register names of LPASS domain
-                "cc", "qdsp6ss".
-
-Example:
-
-The below node has to be defined in the cases where the LPASS peripheral loader
-would bring the subsystem out of reset.
-
-       lpasscc: clock-controller@17014000 {
-               compatible = "qcom,sdm845-lpasscc";
-               reg = <0x17014000 0x1f004>, <0x17300000 0x200>;
-               reg-names = "cc", "qdsp6ss";
-               #clock-cells = <1>;
-       };
diff --git a/Documentation/devicetree/bindings/clock/qcom,sdm845-lpasscc.yaml b/Documentation/devicetree/bindings/clock/qcom,sdm845-lpasscc.yaml
new file mode 100644 (file)
index 0000000..a96fd83
--- /dev/null
@@ -0,0 +1,47 @@
+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/clock/qcom,sdm845-lpasscc.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Qualcomm SDM845 LPASS Clock Controller
+
+maintainers:
+  - Bjorn Andersson <andersson@kernel.org>
+
+description: |
+  Qualcomm SDM845 LPASS (Low Power Audio SubSystem) Clock Controller.
+
+  See also:: include/dt-bindings/clock/qcom,lpass-sdm845.h
+
+properties:
+  compatible:
+    const: qcom,sdm845-lpasscc
+
+  '#clock-cells':
+    const: 1
+
+  reg:
+    maxItems: 2
+
+  reg-names:
+    items:
+      - const: cc
+      - const: qdsp6ss
+
+required:
+  - compatible
+  - '#clock-cells'
+  - reg
+  - reg-names
+
+additionalProperties: false
+
+examples:
+  - |
+    clock-controller@17014000 {
+        compatible = "qcom,sdm845-lpasscc";
+        reg = <0x17014000 0x1f004>, <0x17300000 0x200>;
+        reg-names = "cc", "qdsp6ss";
+        #clock-cells = <1>;
+    };