+Wed Apr 22 17:07:35 1998 Michael Meissner <meissner@cygnus.com>
+
+ * loop.c (note_addr_stored): Correct function to take 2 arguments,
+ instead of 1.
+
+ * rtl.def (MATCH_INSN2): Add new matching pattern.
+ * genrecog.c (add_to_sequence): Support MATCH_INSN2.
+
Wed Apr 22 15:52:22 1998 John Carr <jfc@mit.edu>
* emit-rtl.c (gen_highpart): The high part of a CONST_INT is not zero
if HOST_BITS_PER_WIDE_INT is larger than BITS_PER_WORD.
-
+
* final.c (split_double): Sign extend both halves of a split CONST_INT.
Wed Apr 22 10:42:45 1998 Jeffrey A Law (law@cygnus.com)
case MATCH_SCRATCH:
case MATCH_OPERATOR:
case MATCH_PARALLEL:
+ case MATCH_INSN2:
new->opno = XINT (pattern, 0);
new->code = (code == MATCH_PARALLEL ? PARALLEL : UNKNOWN);
new->enforce_mode = 0;
static rtx libcall_other_reg PROTO((rtx, rtx));
static int labels_in_range_p PROTO((rtx, int));
static void count_loop_regs_set PROTO((rtx, rtx, char *, rtx *, int *, int));
-static void note_addr_stored PROTO((rtx));
+static void note_addr_stored PROTO((rtx, rtx));
static int loop_reg_used_before_p PROTO((rtx, rtx, rtx, rtx, rtx));
static void scan_loop PROTO((rtx, rtx, int, int));
#if 0
/* Record that a memory reference X is being set. */
static void
-note_addr_stored (x)
+note_addr_stored (x, y)
rtx x;
+ rtx y ATTRIBUTE_UNUSED;
{
register int i;
Like @code{match_op_dup}, but for @code{match_parallel} instead of
@code{match_operator}.
+@findex match_insn
+@item (match_insn @var{predicate})
+Match a complete insn. Unlike the other @code{match_*} recognizers,
+@code{match_insn} does not take an operand number.
+
+The machine mode @var{m} of @code{match_insn} works like that of
+@code{match_operand}: it is passed as the second argument to the
+predicate function, and that function is solely responsible for
+deciding whether the expression to be matched ``has'' that mode.
+
+@findex match_insn2
+@item (match_insn2 @var{n} @var{predicate})
+Match a complete insn.
+
+The machine mode @var{m} of @code{match_insn2} works like that of
+@code{match_operand}: it is passed as the second argument to the
+predicate function, and that function is solely responsible for
+deciding whether the expression to be matched ``has'' that mode.
+
@findex address
@item (address (match_operand:@var{m} @var{n} "address_operand" ""))
This complex of expressions is a placeholder for an operand number
/* This file contains the definitions and documentation for the
Register Transfer Expressions (rtx's) that make up the
Register Transfer Language (rtl) used in the Back End of the GNU compiler.
- Copyright (C) 1987, 88, 92, 94, 95, 1997 Free Software Foundation, Inc.
+ Copyright (C) 1987, 88, 92, 94, 95, 97, 1998 Free Software Foundation, Inc.
This file is part of GNU CC.
"b" an rtx code for a bit-field operation (ZERO_EXTRACT, SIGN_EXTRACT)
"i" an rtx code for a machine insn (INSN, JUMP_INSN, CALL_INSN)
"m" an rtx code for something that matches in insns (e.g, MATCH_DUP)
+ "g" an rtx code for grouping insns together (e.g, GROUP_PARALLEL)
"x" everything else
*/
DEF_RTL_EXPR(MATCH_INSN, "match_insn", "s", 'm')
/* Appears only in machine descriptions.
+ Operand 0 is the operand number, as in match_operand.
+ Operand 1 is the predicate to apply to the insn. */
+DEF_RTL_EXPR(MATCH_INSN2, "match_insn2", "is", 'm')
+
+/* Appears only in machine descriptions.
Defines the pattern for one kind of instruction.
Operand:
0: names this instruction.