clk: exynos5433: Extend list of available AUD_PLL output frequencies

Add one more entry to the exynos5433_aud_pll_rates table, this allows
to support audio sample rates: 48000, 96000, 192000 Hz with minimum
error. The M, P, S, K values re confirmed by the HW team.

Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Acked-by: Chanwoo Choi <cw00.choi@samsung.com>

diff --git a/drivers/clk/samsung/clk-exynos5433.c b/drivers/clk/samsung/clk-exynos5433.c
index c84326d..57a4182 100644 (file)
--- a/drivers/clk/samsung/clk-exynos5433.c
+++ b/drivers/clk/samsung/clk-exynos5433.c
@@ -765,6 +765,7 @@ static const struct samsung_pll_rate_table exynos5433_aud_pll_rates[] __initcons
        PLL_36XX_RATE(294912000U,  98, 1, 3,  19923),
        PLL_36XX_RATE(288000000U,  96, 1, 3,      0),
        PLL_36XX_RATE(252000000U,  84, 1, 3,      0),
+       PLL_36XX_RATE(196608001U, 197, 3, 3, -25690),
        { /* sentinel */ }
 };