ALSA: hda/cirrus: Add extra 10 ms delay to allow PLL settle and lock.
authorVitaly Rodionov <vitalyr@opensource.cirrus.com>
Mon, 5 Dec 2022 14:57:13 +0000 (14:57 +0000)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Sat, 7 Jan 2023 10:11:43 +0000 (11:11 +0100)
[ Upstream commit 9fb9fa18fb50d1a33a1bd947681fce96fc2c8db6 ]

New HW platforms with multiple CS42L42 parts, faster CPU and i2c
requre some extra delay to allow PLL to settle and lock. Adding
extra 10ms delay.

Signed-off-by: Vitaly Rodionov <vitalyr@opensource.cirrus.com>
Link: https://lore.kernel.org/r/20221205145713.23852-1-vitalyr@opensource.cirrus.com
Signed-off-by: Takashi Iwai <tiwai@suse.de>
Signed-off-by: Sasha Levin <sashal@kernel.org>
sound/pci/hda/patch_cs8409.c

index 754aa8ddd2e4f0a6794409cc4bce9d46a4d0635d..0ba1fbcbb21e47508ba3d685f01162366e5ba6d6 100644 (file)
@@ -888,7 +888,7 @@ static void cs42l42_resume(struct sub_codec *cs42l42)
 
        /* Initialize CS42L42 companion codec */
        cs8409_i2c_bulk_write(cs42l42, cs42l42->init_seq, cs42l42->init_seq_num);
-       usleep_range(20000, 25000);
+       usleep_range(30000, 35000);
 
        /* Clear interrupts, by reading interrupt status registers */
        cs8409_i2c_bulk_read(cs42l42, irq_regs, ARRAY_SIZE(irq_regs));