cvbsout: add cvbsout pal_m pal_n support

PD#169423: add cvbsout pal_m pal_n display mode support

Change-Id: I6d0458f5e6fccf31c52957d23da9fe0e76471213
Signed-off-by: Nian Jing <nian.jing@amlogic.com>

diff --git a/drivers/amlogic/media/vout/cvbs/cvbs_mode.h b/drivers/amlogic/media/vout/cvbs/cvbs_mode.h
index 91c6d75..91103a6 100644 (file)
--- a/drivers/amlogic/media/vout/cvbs/cvbs_mode.h
+++ b/drivers/amlogic/media/vout/cvbs/cvbs_mode.h
@@ -21,6 +21,8 @@
 enum cvbs_mode_e {
        MODE_480CVBS = 0,
        MODE_576CVBS,
+       MODE_PAL_M,
+       MODE_PAL_N,
        MODE_MAX,
 };
 

diff --git a/drivers/amlogic/media/vout/cvbs/cvbs_out.c b/drivers/amlogic/media/vout/cvbs/cvbs_out.c
index c9eca53..8633c90 100644 (file)
--- a/drivers/amlogic/media/vout/cvbs/cvbs_out.c
+++ b/drivers/amlogic/media/vout/cvbs/cvbs_out.c
@@ -78,7 +78,7 @@ static struct vinfo_s cvbs_info[] = {
                .viu_mux           = VIU_MUX_ENCI,
                .vout_device       = NULL,
        },
-       { /* MODE_576I */
+       { /* MODE_576CVBS */
                .name              = "576cvbs",
                .mode              = VMODE_CVBS,
                .width             = 720,
@@ -96,6 +96,40 @@ static struct vinfo_s cvbs_info[] = {
                .viu_mux           = VIU_MUX_ENCI,
                .vout_device       = NULL,
        },
+       { /* MODE_PAL_M */
+               .name              = "pal_m",
+               .mode              = VMODE_CVBS,
+               .width             = 720,
+               .height            = 480,
+               .field_height      = 240,
+               .aspect_ratio_num  = 4,
+               .aspect_ratio_den  = 3,
+               .sync_duration_num = 60,
+               .sync_duration_den = 1,
+               .video_clk         = 27000000,
+               .htotal            = 1716,
+               .vtotal            = 525,
+               .viu_color_fmt     = COLOR_FMT_YUV444,
+               .viu_mux           = VIU_MUX_ENCI,
+               .vout_device       = NULL,
+       },
+       { /* MODE_PAL_N */
+               .name              = "pal_n",
+               .mode              = VMODE_CVBS,
+               .width             = 720,
+               .height            = 576,
+               .field_height      = 288,
+               .aspect_ratio_num  = 4,
+               .aspect_ratio_den  = 3,
+               .sync_duration_num = 50,
+               .sync_duration_den = 1,
+               .video_clk         = 27000000,
+               .htotal            = 1728,
+               .vtotal            = 625,
+               .viu_color_fmt     = COLOR_FMT_YUV444,
+               .viu_mux           = VIU_MUX_ENCI,
+               .vout_device       = NULL,
+       },
 };
 
 /*bit[0]: 0=vid_pll, 1=gp0_pll*/
@@ -376,12 +410,26 @@ int cvbs_out_setmode(void)
 {
        int ret;
 
-       cvbs_log_info("SET cvbs mode:%s(%d)\n",
-               (local_cvbs_mode == 0) ? "480cvbs" :
-               ((local_cvbs_mode == 1) ? "576cvbs" :
-               "invalid"), local_cvbs_mode);
+       switch (local_cvbs_mode) {
+       case MODE_480CVBS:
+               cvbs_log_info("SET cvbs mode: 480cvbs\n");
+               break;
+       case MODE_576CVBS:
+               cvbs_log_info("SET cvbs mode: 576cvbs\n");
+               break;
+       case MODE_PAL_M:
+               cvbs_log_info("SET cvbs mode: pal_m\n");
+               break;
+       case MODE_PAL_N:
+               cvbs_log_info("SET cvbs mode: pal_n\n");
+               break;
+       default:
+               cvbs_log_err("cvbs_out_setmode:invalid cvbs mode");
+               break;
+       }
+
        if (local_cvbs_mode >= MODE_MAX) {
-               cvbs_log_err("cvbs_out_setmode:cvbsmode error.");
+               cvbs_log_err("cvbs_out_setmode:mode error.return");
                return -1;
        }
        mutex_lock(&setmode_mutex);
@@ -718,6 +766,8 @@ static void bist_test_store(char *para)
                switch (local_cvbs_mode) {
                case MODE_480CVBS:
                case MODE_576CVBS:
+               case MODE_PAL_M:
+               case MODE_PAL_N:
                        cvbs_out_reg_write(ENCI_TST_EN, 0);
                        break;
                default:
@@ -730,6 +780,8 @@ static void bist_test_store(char *para)
                switch (local_cvbs_mode) {
                case MODE_480CVBS:
                case MODE_576CVBS:
+               case MODE_PAL_M:
+               case MODE_PAL_N:
                        cvbs_out_reg_write(ENCI_TST_CLRBAR_STRT, 0x112);
                        cvbs_out_reg_write(ENCI_TST_CLRBAR_WIDTH, 0xb4);
                        cvbs_out_reg_write(ENCI_TST_MDSEL, (unsigned int)num);
@@ -959,7 +1011,10 @@ static void cvbs_debug_store(char *buf)
                cmd = CMD_VP_SET_PLLPATH;
        else if (!strncmp(argv[0], "help", strlen("help")))
                cmd = CMD_HELP;
-       else {
+       else if (!strncmp(argv[0], "cvbs_ver", strlen("cvbs_ver"))) {
+               print_info("cvbsout version : %s\n", CVBSOUT_VER);
+               goto DEBUG_END;
+       } else {
                print_info("[%s] invalid cmd = %s!\n", __func__, argv[0]);
                goto DEBUG_END;
        }
@@ -1152,7 +1207,8 @@ static void cvbs_debug_store(char *buf)
                "\twb value_hex c/h/v address_hex start_dec length_dec\n"
                "\tbist 0/1/2/3/off\n"
                "\tclkdump\n"
-               "\tset_clkpath 0/1/2/3\n");
+               "\tset_clkpath 0/1/2/3\n"
+               "\tcvbs_ver\n");
                break;
        }
 

diff --git a/drivers/amlogic/media/vout/cvbs/cvbs_out.h b/drivers/amlogic/media/vout/cvbs/cvbs_out.h
index 902f19d..2e8e32c 100644 (file)
--- a/drivers/amlogic/media/vout/cvbs/cvbs_out.h
+++ b/drivers/amlogic/media/vout/cvbs/cvbs_out.h
@@ -25,6 +25,8 @@
 #include <linux/amlogic/media/vout/vout_notify.h>
 #include "cvbs_mode.h"
 
+#define CVBSOUT_VER "Ref.2018/07/02"
+
 #define CVBS_CLASS_NAME        "cvbs"
 #define CVBS_NAME      "cvbs"
 #define        MAX_NUMBER_PARA  10

diff --git a/drivers/amlogic/media/vout/cvbs/cvbsregs.h b/drivers/amlogic/media/vout/cvbs/cvbsregs.h
index 7734725..21663a6 100644 (file)
--- a/drivers/amlogic/media/vout/cvbs/cvbsregs.h
+++ b/drivers/amlogic/media/vout/cvbs/cvbsregs.h
@@ -289,10 +289,112 @@ static const struct reg_s cvbsregs_576cvbs_enc[] = {
        {MREG_END_MARKER,                 0          }
 };
 
+static const struct reg_s cvbsregs_pal_m_enc[] = {
+       {ENCI_CFILT_CTRL,              0x12,  },
+       {ENCI_CFILT_CTRL2,             0x12,  },
+       {VENC_DVI_SETTING,             0,     },
+       {ENCI_VIDEO_MODE,              0,     },
+       {ENCI_VIDEO_MODE_ADV,          0,     },
+       {ENCI_SYNC_HSO_BEGIN,          5,     },
+       {ENCI_SYNC_HSO_END,            129,   },
+       {ENCI_SYNC_VSO_EVNLN,          0x0003 },
+       {ENCI_SYNC_VSO_ODDLN,          0x0104 },
+       {ENCI_MACV_MAX_AMP,            0x810b },
+       {VENC_VIDEO_PROG_MODE,         0xf0   },
+       {ENCI_VIDEO_MODE,              0x2a   },
+       {ENCI_VIDEO_MODE_ADV,          0x26,  },
+       {ENCI_VIDEO_SCH,               0x20,  },
+       {ENCI_SYNC_MODE,               0x07,  },
+       {ENCI_YC_DELAY,                0x333, },
+       {ENCI_VFIFO2VD_PIXEL_START,    0xe3,  },
+       {ENCI_VFIFO2VD_PIXEL_END,      0x0683,},
+       {ENCI_VFIFO2VD_LINE_TOP_START, 0x12,  },
+       {ENCI_VFIFO2VD_LINE_TOP_END,   0x102, },
+       {ENCI_VFIFO2VD_LINE_BOT_START, 0x13,  },
+       {ENCI_VFIFO2VD_LINE_BOT_END,   0x103, },
+       {VENC_SYNC_ROUTE,              0,     },
+       {ENCI_DBG_PX_RST,              0,     },
+       {VENC_INTCTRL,                 0x2,   },
+       {ENCI_VFIFO2VD_CTL,            0x4e01,},
+       {VENC_VDAC_SETTING,            0,     },
+       {VENC_UPSAMPLE_CTRL0,          0x0061,},
+       {VENC_UPSAMPLE_CTRL1,          0x4061,},
+       {VENC_UPSAMPLE_CTRL2,          0x5061,},
+       {VENC_VDAC_DACSEL0,            0x0000,},
+       {VENC_VDAC_DACSEL1,            0x0000,},
+       {VENC_VDAC_DACSEL2,            0x0000,},
+       {VENC_VDAC_DACSEL3,            0x0000,},
+       {VENC_VDAC_DACSEL4,            0x0000,},
+       {VENC_VDAC_DACSEL5,            0x0000,},
+       {VPU_VIU_VENC_MUX_CTRL,        0x0005,},
+       {VENC_VDAC_FIFO_CTRL,          0x2000,},
+       {ENCI_DACSEL_0,                0x0011 },
+       {ENCI_DACSEL_1,                0x11   },
+       {ENCI_VIDEO_EN,                1,     },
+       {ENCI_VIDEO_SAT,               0x12   },
+       {VENC_VDAC_DAC0_FILT_CTRL0,    0x1    },
+       {VENC_VDAC_DAC0_FILT_CTRL1,    0xfc48 },
+       {ENCI_MACV_N0,                 0x0    },
+       {ENCI_SYNC_ADJ,                0x9c00 },
+       {ENCI_VIDEO_CONT,              0x3    },
+       {MREG_END_MARKER,              0      }
+};
+
+static const struct reg_s cvbsregs_pal_n_enc[] = {
+       {ENCI_CFILT_CTRL,                 0x12,    },
+       {ENCI_CFILT_CTRL2,                 0x12,    },
+       {VENC_DVI_SETTING,                0,         },
+       {ENCI_VIDEO_MODE,                 0,         },
+       {ENCI_VIDEO_MODE_ADV,             0,         },
+       {ENCI_SYNC_HSO_BEGIN,             3,         },
+       {ENCI_SYNC_HSO_END,               129,       },
+       {ENCI_SYNC_VSO_EVNLN,             0x0003     },
+       {ENCI_SYNC_VSO_ODDLN,             0x0104     },
+       {ENCI_MACV_MAX_AMP,               0x8107     },
+       {VENC_VIDEO_PROG_MODE,            0xff       },
+       {ENCI_VIDEO_MODE,                 0x3b       },
+       {ENCI_VIDEO_MODE_ADV,             0x26,      },
+       {ENCI_VIDEO_SCH,                  0x28,      },
+       {ENCI_SYNC_MODE,                  0x07,      },
+       {ENCI_YC_DELAY,                   0x333,     },
+       {ENCI_VFIFO2VD_PIXEL_START,       0x0fb      },
+       {ENCI_VFIFO2VD_PIXEL_END,         0x069b     },
+       {ENCI_VFIFO2VD_LINE_TOP_START,    0x0016     },
+       {ENCI_VFIFO2VD_LINE_TOP_END,      0x0136     },
+       {ENCI_VFIFO2VD_LINE_BOT_START,    0x0017     },
+       {ENCI_VFIFO2VD_LINE_BOT_END,      0x0137     },
+       {VENC_SYNC_ROUTE,                 0,         },
+       {ENCI_DBG_PX_RST,                 0,         },
+       {VENC_INTCTRL,                    0x2,       },
+       {ENCI_VFIFO2VD_CTL,               0x4e01,    },
+       {VENC_VDAC_SETTING,          0,     },
+       {VENC_UPSAMPLE_CTRL0,             0x0061,    },
+       {VENC_UPSAMPLE_CTRL1,             0x4061,    },
+       {VENC_UPSAMPLE_CTRL2,             0x5061,    },
+       {VENC_VDAC_DACSEL0,               0x0000,    },
+       {VENC_VDAC_DACSEL1,               0x0000,    },
+       {VENC_VDAC_DACSEL2,               0x0000,    },
+       {VENC_VDAC_DACSEL3,               0x0000,    },
+       {VENC_VDAC_DACSEL4,               0x0000,    },
+       {VENC_VDAC_DACSEL5,               0x0000,    },
+       {VPU_VIU_VENC_MUX_CTRL,           0x0005,    },
+       {VENC_VDAC_FIFO_CTRL,             0x2000,    },
+       {ENCI_DACSEL_0,                   0x0011     },
+       {ENCI_DACSEL_1,                   0x11       },
+       {ENCI_VIDEO_EN,                   1,         },
+       {ENCI_VIDEO_SAT,                  0x7        },
+       {VENC_VDAC_DAC0_FILT_CTRL0,       0x1        },
+       {VENC_VDAC_DAC0_FILT_CTRL1,       0xfc48     },
+       {ENCI_MACV_N0,                    0x0        },
+       {MREG_END_MARKER,                 0          }
+};
+
 /* Using tvmode as index */
 static struct cvbsregs_set_t cvbsregsTab[] = {
        {MODE_480CVBS, cvbsregs_480cvbs_enc},
        {MODE_576CVBS, cvbsregs_576cvbs_enc},
+       {MODE_PAL_M, cvbsregs_pal_m_enc},
+       {MODE_PAL_N, cvbsregs_pal_n_enc},
 };
 
 #endif /* TVREGS_H */