soc: imx: gpcv2: keep i.MX8MM VPU-H1 bus clock active
authorAdam Ford <aford173@gmail.com>
Sat, 20 Nov 2021 19:39:16 +0000 (13:39 -0600)
committerShawn Guo <shawnguo@kernel.org>
Tue, 23 Nov 2021 12:20:23 +0000 (20:20 +0800)
Enable the vpu-h1 clock when the domain is active because reading
or writing to the VPU-H1 IP block cause the system to hang.

Fixes: 656ade7aa42a ("soc: imx: gpcv2: keep i.MX8M* bus clocks enabled")
Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
drivers/soc/imx/gpcv2.c

index e757044..8176380 100644 (file)
@@ -734,6 +734,7 @@ static const struct imx_pgc_domain imx8mm_pgc_domains[] = {
                        .map = IMX8MM_VPUH1_A53_DOMAIN,
                },
                .pgc   = BIT(IMX8MM_PGC_VPUH1),
+               .keep_clocks = true,
        },
 
        [IMX8MM_POWER_DOMAIN_DISPMIX] = {