[AArch64] Fix cost of (plus ... (const_int -C))

The PLUS handling in aarch64_rtx_costs only checked for nonnegative
constants, meaning that simple immediate subtractions like:

  (set (reg R1) (plus (reg R2) (const_int -8)))

had a cost of two instructions.

2019-09-26  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
	* config/aarch64/aarch64.c (aarch64_rtx_costs): Use
	aarch64_plus_immediate rather than aarch64_uimm12_shift
	to test for valid PLUS immediates.

From-SVN: r276140

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 6786524..8382571 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,9 @@
+2019-09-26  Richard Sandiford  <richard.sandiford@arm.com>
+
+       * config/aarch64/aarch64.c (aarch64_rtx_costs): Use
+       aarch64_plus_immediate rather than aarch64_uimm12_shift
+       to test for valid PLUS immediates.
+
 2019-09-25  Martin Jambor  <mjambor@suse.cz>
 
        * tree-sra.c (no_accesses_p): Remove.

diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c
index 56a4a47..71d44de 100644 (file)
--- a/gcc/config/aarch64/aarch64.c
+++ b/gcc/config/aarch64/aarch64.c
@@ -10753,7 +10753,7 @@ cost_plus:
          }
 
        if (GET_MODE_CLASS (mode) == MODE_INT
-           && ((CONST_INT_P (op1) && aarch64_uimm12_shift (INTVAL (op1)))
+           && (aarch64_plus_immediate (op1, mode)
                || aarch64_sve_addvl_addpl_immediate (op1, mode)))
          {
            *cost += rtx_cost (op0, mode, PLUS, 0, speed);