arm64: tegra: Add GPCDMA node for tegra186 and tegra194

Add device tree node for GPCDMA controller on Tegra186 target
and Tegra194 target.

Signed-off-by: Rajesh Gumasta <rgumasta@nvidia.com>
Signed-off-by: Akhil R <akhilrajeev@nvidia.com>
Reviewed-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>

diff --git a/arch/arm64/boot/dts/nvidia/tegra186.dtsi b/arch/arm64/boot/dts/nvidia/tegra186.dtsi
index c91afff..899d7b1 100644 (file)
--- a/arch/arm64/boot/dts/nvidia/tegra186.dtsi
+++ b/arch/arm64/boot/dts/nvidia/tegra186.dtsi
@@ -73,6 +73,48 @@
                snps,rxpbl = <8>;
        };
 
+       gpcdma: dma-controller@2600000 {
+               compatible = "nvidia,tegra186-gpcdma";
+               reg = <0x0 0x2600000 0x0 0x210000>;
+               resets = <&bpmp TEGRA186_RESET_GPCDMA>;
+               reset-names = "gpcdma";
+               interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>,
+                            <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>,
+                            <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>,
+                            <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>,
+                            <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>,
+                            <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>,
+                            <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>,
+                            <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>,
+                            <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>,
+                            <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>,
+                            <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>,
+                            <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>,
+                            <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>,
+                            <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>,
+                            <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>,
+                            <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>,
+                            <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>,
+                            <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>,
+                            <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>,
+                            <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>,
+                            <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>,
+                            <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>,
+                            <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>,
+                            <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>,
+                            <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>,
+                            <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>,
+                            <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>,
+                            <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>,
+                            <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>,
+                            <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>,
+                            <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
+               #dma-cells = <1>;
+               iommus = <&smmu TEGRA186_SID_GPCDMA_0>;
+               dma-coherent;
+               status = "okay";
+       };
+
        aconnect@2900000 {
                compatible = "nvidia,tegra186-aconnect",
                             "nvidia,tegra210-aconnect";

diff --git a/arch/arm64/boot/dts/nvidia/tegra194.dtsi b/arch/arm64/boot/dts/nvidia/tegra194.dtsi
index 2d48c37..8b58f5c 100644 (file)
--- a/arch/arm64/boot/dts/nvidia/tegra194.dtsi
+++ b/arch/arm64/boot/dts/nvidia/tegra194.dtsi
@@ -115,6 +115,49 @@
                        snps,rxpbl = <8>;
                };
 
+               gpcdma: dma-controller@2600000 {
+                       compatible = "nvidia,tegra194-gpcdma",
+                                    "nvidia,tegra186-gpcdma";
+                       reg = <0x2600000 0x210000>;
+                       resets = <&bpmp TEGRA194_RESET_GPCDMA>;
+                       reset-names = "gpcdma";
+                       interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
+                       #dma-cells = <1>;
+                       iommus = <&smmu TEGRA194_SID_GPCDMA_0>;
+                       dma-coherent;
+                       status = "okay";
+               };
+
                aconnect@2900000 {
                        compatible = "nvidia,tegra194-aconnect",
                                     "nvidia,tegra210-aconnect";