ARM: dts: tegra20: paz00: Add memory timings

PAZ00 board has two variants of DDR2 SDRAM devices for External Memory:
one is Hynix HY5PS1G831CLFP-Y5 and the other is Micron MT47H128M8CF-25:H.
The Micron variant doesn't have official timings in the wild, hence only
timings for the Hynix are added. The memory frequency-scaling was tested
using the Tegra20 devfreq driver.

Tested-by: Marc Dietrich <marvin24@gmx.de>
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>

diff --git a/arch/arm/boot/dts/tegra20-paz00.dts b/arch/arm/boot/dts/tegra20-paz00.dts
index 85fce5b..be0ab9b 100644 (file)
--- a/arch/arm/boot/dts/tegra20-paz00.dts
+++ b/arch/arm/boot/dts/tegra20-paz00.dts
@@ -311,6 +311,52 @@
                reset-names = "i2c";
        };
 
+       memory-controller@7000f400 {
+               nvidia,use-ram-code;
+
+               emc-tables@hynix {
+                       nvidia,ram-code = <0x0>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+
+                       emc-table@166500 {
+                               reg = <166500>;
+                               compatible = "nvidia,tegra20-emc-table";
+                               clock-frequency = <166500>;
+                               nvidia,emc-registers = <0x0000000a 0x00000016
+                                       0x00000008 0x00000003 0x00000004 0x00000004
+                                       0x00000002 0x0000000c 0x00000003 0x00000003
+                                       0x00000002 0x00000001 0x00000004 0x00000005
+                                       0x00000004 0x00000009 0x0000000d 0x000004df
+                                       0x00000000 0x00000003 0x00000003 0x00000003
+                                       0x00000003 0x00000001 0x0000000a 0x000000c8
+                                       0x00000003 0x00000006 0x00000004 0x00000008
+                                       0x00000002 0x00000000 0x00000000 0x00000002
+                                       0x00000000 0x00000000 0x00000083 0xe03b0323
+                                       0x007fe010 0x00001414 0x00000000 0x00000000
+                                       0x00000000 0x00000000 0x00000000 0x00000000>;
+                       };
+
+                       emc-table@333000 {
+                               reg = <333000>;
+                               compatible = "nvidia,tegra20-emc-table";
+                               clock-frequency = <333000>;
+                               nvidia,emc-registers = <0x00000018 0x00000033
+                                       0x00000012 0x00000004 0x00000004 0x00000005
+                                       0x00000003 0x0000000c 0x00000006 0x00000006
+                                       0x00000003 0x00000001 0x00000004 0x00000005
+                                       0x00000004 0x00000009 0x0000000d 0x00000bff
+                                       0x00000000 0x00000003 0x00000003 0x00000006
+                                       0x00000006 0x00000001 0x00000011 0x000000c8
+                                       0x00000003 0x0000000e 0x00000007 0x00000008
+                                       0x00000002 0x00000000 0x00000000 0x00000002
+                                       0x00000000 0x00000000 0x00000083 0xf0440303
+                                       0x007fe010 0x00001414 0x00000000 0x00000000
+                                       0x00000000 0x00000000 0x00000000 0x00000000>;
+                       };
+               };
+       };
+
        i2c@7000d000 {
                status = "okay";
                clock-frequency = <400000>;