.addDef(getOrCreateVReg(CI))
.addUse(getOrCreateVReg(*CI.getArgOperand(0)));
return true;
- case Intrinsic::floor:
- MIRBuilder.buildInstr(TargetOpcode::G_FFLOOR)
- .addDef(getOrCreateVReg(CI))
- .addUse(getOrCreateVReg(*CI.getArgOperand(0)));
- return true;
case Intrinsic::cos:
MIRBuilder.buildInstr(TargetOpcode::G_FCOS)
.addDef(getOrCreateVReg(CI))
ret float %y
}
-declare float @llvm.floor.f32(float)
-define float @test_floor_f32(float %x) {
- ; CHECK-LABEL: name: test_floor_f32
- ; CHECK: %{{[0-9]+}}:_(s32) = G_FFLOOR %{{[0-9]+}}
- %y = call float @llvm.floor.f32(float %x)
- ret float %y
-}
-
; CHECK-LABEL: name: test_llvm.aarch64.neon.ld3.v4i32.p0i32
; CHECK: %1:_(s384) = G_INTRINSIC_W_SIDE_EFFECTS intrinsic(@llvm.aarch64.neon.ld3), %0(p0) :: (load 48 from %ir.ptr, align 64)
define void @test_llvm.aarch64.neon.ld3.v4i32.p0i32(i32* %ptr) {