MipsOperandConverter i(this, instr);
Register input = i.InputRegister(0);
for (size_t index = 2; index < instr->InputCount(); index += 2) {
- __ Branch(GetLabel(i.InputRpo(index + 1)), eq, input,
- Operand(i.InputInt32(index + 0)));
+ __ li(at, Operand(i.InputInt32(index + 0)));
+ __ beq(input, at, GetLabel(i.InputRpo(index + 1)));
}
+ __ nop(); // Branch delay slot of the last beq.
AssembleArchJump(i.InputRpo(1));
}
size_t const case_count = instr->InputCount() - 2;
Label here;
__ Branch(GetLabel(i.InputRpo(1)), hs, input, Operand(case_count));
+ __ BlockTrampolinePoolFor(case_count + 6);
__ bal(&here);
- __ nop(); // Branch delay slot nop.
+ __ sll(at, input, 2); // Branch delay slot.
__ bind(&here);
- __ sll(at, input, 2);
__ addu(at, at, ra);
- __ lw(at, MemOperand(at, 5 * v8::internal::Assembler::kInstrSize));
+ __ lw(at, MemOperand(at, 4 * v8::internal::Assembler::kInstrSize));
__ jr(at);
__ nop(); // Branch delay slot nop.
for (size_t index = 0; index < case_count; ++index) {
// Determine whether to issue an ArchTableSwitch or an ArchLookupSwitch
// instruction.
- size_t table_space_cost = 4 + value_range;
- size_t table_time_cost = 3;
- size_t lookup_space_cost = 3 + 2 * case_count;
+ size_t table_space_cost = 9 + value_range;
+ size_t table_time_cost = 9;
+ size_t lookup_space_cost = 2 + 2 * case_count;
size_t lookup_time_cost = case_count;
if (case_count > 0 &&
table_space_cost + 3 * table_time_cost <=
MipsOperandConverter i(this, instr);
Register input = i.InputRegister(0);
for (size_t index = 2; index < instr->InputCount(); index += 2) {
- __ Branch(GetLabel(i.InputRpo(index + 1)), eq, input,
- Operand(i.InputInt32(index + 0)));
+ __ li(at, Operand(i.InputInt32(index + 0)));
+ __ beq(input, at, GetLabel(i.InputRpo(index + 1)));
}
+ __ nop(); // Branch delay slot of the last beq.
AssembleArchJump(i.InputRpo(1));
}
Label here;
__ Branch(GetLabel(i.InputRpo(1)), hs, input, Operand(case_count));
- // Ensure that dd-ed labels goes to 8 byte aligned addresses.
- if ((masm()->pc_offset() & 7) == 0) {
+ __ BlockTrampolinePoolFor(case_count * 2 + 7);
+ // Ensure that dd-ed labels use 8 byte aligned addresses.
+ if ((masm()->pc_offset() & 7) != 0) {
__ nop();
}
__ bal(&here);
- __ nop(); // Branch delay slot nop.
+ __ dsll(at, input, 3); // Branch delay slot.
__ bind(&here);
- __ dsll(at, input, 3);
__ daddu(at, at, ra);
- __ ld(at, MemOperand(at, 5 * v8::internal::Assembler::kInstrSize));
+ __ ld(at, MemOperand(at, 4 * v8::internal::Assembler::kInstrSize));
__ jr(at);
__ nop(); // Branch delay slot nop.
for (size_t index = 0; index < case_count; ++index) {
// Determine whether to issue an ArchTableSwitch or an ArchLookupSwitch
// instruction.
- size_t table_space_cost = 4 + value_range;
- size_t table_time_cost = 3;
- size_t lookup_space_cost = 3 + 2 * case_count;
+ size_t table_space_cost = 10 + 2 * value_range;
+ size_t table_time_cost = 10;
+ size_t lookup_space_cost = 2 + 2 * case_count;
size_t lookup_time_cost = case_count;
if (case_count > 0 &&
table_space_cost + 3 * table_time_cost <=