x86: Rename existing FSP code to fsp1
authorSimon Glass <sjg@chromium.org>
Wed, 25 Sep 2019 14:00:11 +0000 (08:00 -0600)
committerBin Meng <bmeng.cn@gmail.com>
Tue, 8 Oct 2019 05:50:08 +0000 (13:50 +0800)
Since there is now a new version of the FSP and it is incompatible with
the existing version, move the code into an fsp1 directory. This will
allow us to put FSP v2 code into an fsp2 directory.

Add a Kconfig which defines which version is in use.

Some of the code in this new fsp1/ directory is generic across both FSPv1
and FSPv2. Future patches will address this.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
28 files changed:
arch/x86/Kconfig
arch/x86/cpu/baytrail/acpi.c
arch/x86/cpu/baytrail/fsp_configs.c
arch/x86/cpu/braswell/fsp_configs.c
arch/x86/cpu/ivybridge/fsp_configs.c
arch/x86/cpu/queensbay/fsp_configs.c
arch/x86/cpu/queensbay/tnc.c
arch/x86/include/asm/fsp1/fsp_api.h [moved from arch/x86/include/asm/fsp/fsp_api.h with 100% similarity]
arch/x86/include/asm/fsp1/fsp_azalia.h [moved from arch/x86/include/asm/fsp/fsp_azalia.h with 100% similarity]
arch/x86/include/asm/fsp1/fsp_bootmode.h [moved from arch/x86/include/asm/fsp/fsp_bootmode.h with 100% similarity]
arch/x86/include/asm/fsp1/fsp_ffs.h [moved from arch/x86/include/asm/fsp/fsp_ffs.h with 100% similarity]
arch/x86/include/asm/fsp1/fsp_fv.h [moved from arch/x86/include/asm/fsp/fsp_fv.h with 100% similarity]
arch/x86/include/asm/fsp1/fsp_hob.h [moved from arch/x86/include/asm/fsp/fsp_hob.h with 100% similarity]
arch/x86/include/asm/fsp1/fsp_infoheader.h [moved from arch/x86/include/asm/fsp/fsp_infoheader.h with 100% similarity]
arch/x86/include/asm/fsp1/fsp_support.h [moved from arch/x86/include/asm/fsp/fsp_support.h with 100% similarity]
arch/x86/include/asm/fsp1/fsp_types.h [moved from arch/x86/include/asm/fsp/fsp_types.h with 100% similarity]
arch/x86/include/asm/u-boot-x86.h
arch/x86/lib/Makefile
arch/x86/lib/fsp1/Makefile [moved from arch/x86/lib/fsp/Makefile with 100% similarity]
arch/x86/lib/fsp1/fsp_car.S [moved from arch/x86/lib/fsp/fsp_car.S with 100% similarity]
arch/x86/lib/fsp1/fsp_common.c [moved from arch/x86/lib/fsp/fsp_common.c with 99% similarity]
arch/x86/lib/fsp1/fsp_dram.c [moved from arch/x86/lib/fsp/fsp_dram.c with 98% similarity]
arch/x86/lib/fsp1/fsp_graphics.c [moved from arch/x86/lib/fsp/fsp_graphics.c with 98% similarity]
arch/x86/lib/fsp1/fsp_support.c [moved from arch/x86/lib/fsp/fsp_support.c with 99% similarity]
board/advantech/som-db5800-som-6867/som-db5800-som-6867.c
board/intel/cherryhill/cherryhill.c
cmd/x86/fsp.c
drivers/pci/pci-uclass.c

index 218e817..314f8de 100644 (file)
@@ -364,6 +364,29 @@ config HAVE_FSP
          Note: Without this binary U-Boot will not be able to set up its
          SDRAM so will not boot.
 
+choice
+       prompt "FSP version"
+       depends on HAVE_FSP
+       default FSP_VERSION1
+       help
+         Selects the FSP version to use. Intel has published several versions
+         of the FSP External Architecture Specification and this allows
+         selection of the version number used by a particular SoC.
+
+config FSP_VERSION1
+       bool "FSP version 1.x"
+       help
+         This covers versions 1.0 and 1.1a. See here for details:
+         https://github.com/IntelFsp/fsp/wiki
+
+config FSP_VERSION2
+       bool "FSP version 2.x"
+       help
+         This covers versions 2.0 and 2.1. See here for details:
+         https://github.com/IntelFsp/fsp/wiki
+
+endchoice
+
 config FSP_FILE
        string "Firmware Support Package binary filename"
        depends on HAVE_FSP
@@ -429,7 +452,7 @@ config ENABLE_MRC_CACHE
 
          For platforms that use Intel FSP for the memory initialization,
          please check FSP output HOB via U-Boot command 'fsp hob' to see
-         if there is FSP_NON_VOLATILE_STORAGE_HOB_GUID (asm/fsp/fsp_hob.h).
+         if there is FSP_NON_VOLATILE_STORAGE_HOB_GUID (asm/fsp1/fsp_hob.h).
          If such GUID does not exist, MRC cache is not available on such
          platform (eg: Intel Queensbay), which means selecting this option
          here does not make any difference.
index 445e4ba..1e3829a 100644 (file)
@@ -167,7 +167,7 @@ void acpi_create_gnvs(struct acpi_global_nvs *gnvs)
  * and PMC_BASE_ADDRESS are accessed, so we need make sure the base addresses
  * of these two blocks are programmed by either U-Boot or FSP.
  *
- * It has been verified that 1st phase API (see arch/x86/lib/fsp/fsp_car.S)
+ * It has been verified that 1st phase API (see arch/x86/lib/fsp1/fsp_car.S)
  * on Intel BayTrail SoC already initializes these two base addresses so
  * we are safe to access these registers here.
  */
index cefd262..5b5d66a 100644 (file)
@@ -7,7 +7,7 @@
 
 #include <common.h>
 #include <fdtdec.h>
-#include <asm/fsp/fsp_support.h>
+#include <asm/fsp1/fsp_support.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
index 7fe6fa7..607e333 100644 (file)
@@ -5,7 +5,7 @@
 
 #include <common.h>
 #include <fdtdec.h>
-#include <asm/fsp/fsp_support.h>
+#include <asm/fsp1/fsp_support.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
index 2fd06b3..773c2b2 100644 (file)
@@ -5,7 +5,7 @@
 
 #include <common.h>
 #include <fdtdec.h>
-#include <asm/fsp/fsp_support.h>
+#include <asm/fsp1/fsp_support.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
index c4d1177..0dd1901 100644 (file)
@@ -5,7 +5,7 @@
  */
 
 #include <common.h>
-#include <asm/fsp/fsp_support.h>
+#include <asm/fsp1/fsp_support.h>
 
 void update_fsp_configs(struct fsp_config_data *config,
                        struct fspinit_rtbuf *rt_buf)
index 76556fc..66737e6 100644 (file)
@@ -12,7 +12,7 @@
 #include <asm/post.h>
 #include <asm/arch/device.h>
 #include <asm/arch/tnc.h>
-#include <asm/fsp/fsp_support.h>
+#include <asm/fsp1/fsp_support.h>
 #include <asm/processor.h>
 
 static int __maybe_unused disable_igd(void)
index c252192..2466ad2 100644 (file)
@@ -74,7 +74,7 @@ u32 isa_map_rom(u32 bus_addr, int size);
 /* arch/x86/lib/... */
 int video_bios_init(void);
 
-/* arch/x86/lib/fsp/... */
+/* arch/x86/lib/fsp1,2/... */
 
 /**
  * fsp_save_s3_stack() - save stack address to CMOS for next S3 boot
index 906be5e..a8c7448 100644 (file)
@@ -43,7 +43,8 @@ ifndef CONFIG_SPL_BUILD
 obj-$(CONFIG_CMD_ZBOOT)        += zimage.o
 endif
 obj-$(CONFIG_USE_HOB) += hob.o
-obj-$(CONFIG_HAVE_FSP) += fsp/
+obj-$(CONFIG_FSP_VERSION1) += fsp1/
+obj-$(CONFIG_FSP_VERSION2) += fsp2/
 
 ifdef CONFIG_SPL_BUILD
 ifdef CONFIG_TPL_BUILD
similarity index 99%
rename from arch/x86/lib/fsp/fsp_common.c
rename to arch/x86/lib/fsp1/fsp_common.c
index ed0827c..591eef7 100644 (file)
@@ -14,7 +14,7 @@
 #include <asm/mrccache.h>
 #include <asm/post.h>
 #include <asm/processor.h>
-#include <asm/fsp/fsp_support.h>
+#include <asm/fsp1/fsp_support.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
similarity index 98%
rename from arch/x86/lib/fsp/fsp_dram.c
rename to arch/x86/lib/fsp1/fsp_dram.c
index 3a23b70..3bf65b4 100644 (file)
@@ -4,7 +4,7 @@
  */
 
 #include <common.h>
-#include <asm/fsp/fsp_support.h>
+#include <asm/fsp1/fsp_support.h>
 #include <asm/e820.h>
 #include <asm/mrccache.h>
 #include <asm/post.h>
similarity index 98%
rename from arch/x86/lib/fsp/fsp_graphics.c
rename to arch/x86/lib/fsp1/fsp_graphics.c
index 91d2d08..52e7133 100644 (file)
@@ -7,7 +7,7 @@
 #include <dm.h>
 #include <vbe.h>
 #include <video.h>
-#include <asm/fsp/fsp_support.h>
+#include <asm/fsp1/fsp_support.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
similarity index 99%
rename from arch/x86/lib/fsp/fsp_support.c
rename to arch/x86/lib/fsp1/fsp_support.c
index 0eaa9b2..019a42f 100644 (file)
@@ -5,7 +5,7 @@
  */
 
 #include <common.h>
-#include <asm/fsp/fsp_support.h>
+#include <asm/fsp1/fsp_support.h>
 #include <asm/post.h>
 
 struct fsp_header *__attribute__((optimize("O0"))) find_fsp_header(void)
index ac12f30..8f4c587 100644 (file)
@@ -5,7 +5,7 @@
  */
 
 #include <common.h>
-#include <asm/fsp/fsp_support.h>
+#include <asm/fsp1/fsp_support.h>
 
 /* ALC262 Verb Table - 10EC0262 */
 static const u32 verb_table_data13[] = {
index 695af6b..c037d5b 100644 (file)
@@ -5,7 +5,7 @@
 
 #include <common.h>
 #include <asm/arch/gpio.h>
-#include <asm/fsp/fsp_support.h>
+#include <asm/fsp1/fsp_support.h>
 
 static const struct gpio_family gpio_family[] = {
        GPIO_FAMILY_CONF("SOUTHEAST_2_hshvfamily_2x3_rcomp_7_0", NA, 0,
index efa1838..fb27624 100644 (file)
@@ -5,7 +5,7 @@
 
 #include <common.h>
 #include <command.h>
-#include <asm/fsp/fsp_support.h>
+#include <asm/fsp1/fsp_support.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
index ab3e131..b73d0cd 100644 (file)
@@ -12,7 +12,7 @@
 #include <dm/device-internal.h>
 #include <dm/lists.h>
 #if defined(CONFIG_X86) && defined(CONFIG_HAVE_FSP)
-#include <asm/fsp/fsp_support.h>
+#include <asm/fsp1/fsp_support.h>
 #endif
 #include "pci_internal.h"