if (!key->multisample_fbo)
NIR_PASS_V(nir, brw_nir_demote_sample_qualifiers);
NIR_PASS_V(nir, brw_nir_move_interpolation_to_top);
- brw_postprocess_nir(nir, compiler, true, debug_enabled);
+ brw_postprocess_nir(nir, compiler, true, debug_enabled,
+ key->base.robust_buffer_access);
brw_nir_populate_wm_prog_data(nir, compiler->devinfo, key, prog_data);
NIR_PASS_V(shader, nir_opt_constant_folding);
NIR_PASS_V(shader, nir_opt_dce);
- brw_postprocess_nir(shader, compiler, true, debug_enabled);
+ brw_postprocess_nir(shader, compiler, true, debug_enabled,
+ key->base.robust_buffer_access);
return shader;
}
const unsigned max_dispatch_width = 16;
brw_nir_apply_key(shader, compiler, &key->base, max_dispatch_width, true);
- brw_postprocess_nir(shader, compiler, true, debug_enabled);
+ brw_postprocess_nir(shader, compiler, true, debug_enabled,
+ key->base.robust_buffer_access);
fs_visitor *v = NULL, *v8 = NULL, *v16 = NULL;
bool has_spilled = false;
static void
brw_vectorize_lower_mem_access(nir_shader *nir,
const struct brw_compiler *compiler,
- bool is_scalar)
+ bool is_scalar,
+ bool robust_buffer_access)
{
const struct gen_device_info *devinfo = compiler->devinfo;
bool progress = false;
.robust_modes = (nir_variable_mode)0,
};
+ if (robust_buffer_access) {
+ options.robust_modes = nir_var_mem_ubo | nir_var_mem_ssbo |
+ nir_var_mem_global;
+ }
+
OPT(nir_opt_load_store_vectorize, &options);
}
*/
void
brw_postprocess_nir(nir_shader *nir, const struct brw_compiler *compiler,
- bool is_scalar, bool debug_enabled)
+ bool is_scalar, bool debug_enabled,
+ bool robust_buffer_access)
{
const struct gen_device_info *devinfo = compiler->devinfo;
brw_nir_optimize(nir, compiler, is_scalar, false);
}
- brw_vectorize_lower_mem_access(nir, compiler, is_scalar);
+ brw_vectorize_lower_mem_access(nir, compiler, is_scalar,
+ robust_buffer_access);
if (OPT(nir_lower_int64))
brw_nir_optimize(nir, compiler, is_scalar, false);
static void
populate_base_prog_key(const struct gen_device_info *devinfo,
VkPipelineShaderStageCreateFlags flags,
+ bool robust_buffer_acccess,
struct brw_base_prog_key *key)
{
if (flags & VK_PIPELINE_SHADER_STAGE_CREATE_ALLOW_VARYING_SUBGROUP_SIZE_BIT_EXT)
else
key->subgroup_size_type = BRW_SUBGROUP_SIZE_API_CONSTANT;
+ key->robust_buffer_access = robust_buffer_acccess;
+
populate_sampler_prog_key(devinfo, &key->tex);
}
static void
populate_vs_prog_key(const struct gen_device_info *devinfo,
VkPipelineShaderStageCreateFlags flags,
+ bool robust_buffer_acccess,
struct brw_vs_prog_key *key)
{
memset(key, 0, sizeof(*key));
- populate_base_prog_key(devinfo, flags, &key->base);
+ populate_base_prog_key(devinfo, flags, robust_buffer_acccess, &key->base);
/* XXX: Handle vertex input work-arounds */
static void
populate_tcs_prog_key(const struct gen_device_info *devinfo,
VkPipelineShaderStageCreateFlags flags,
+ bool robust_buffer_acccess,
unsigned input_vertices,
struct brw_tcs_prog_key *key)
{
memset(key, 0, sizeof(*key));
- populate_base_prog_key(devinfo, flags, &key->base);
+ populate_base_prog_key(devinfo, flags, robust_buffer_acccess, &key->base);
key->input_vertices = input_vertices;
}
static void
populate_tes_prog_key(const struct gen_device_info *devinfo,
VkPipelineShaderStageCreateFlags flags,
+ bool robust_buffer_acccess,
struct brw_tes_prog_key *key)
{
memset(key, 0, sizeof(*key));
- populate_base_prog_key(devinfo, flags, &key->base);
+ populate_base_prog_key(devinfo, flags, robust_buffer_acccess, &key->base);
}
static void
populate_gs_prog_key(const struct gen_device_info *devinfo,
VkPipelineShaderStageCreateFlags flags,
+ bool robust_buffer_acccess,
struct brw_gs_prog_key *key)
{
memset(key, 0, sizeof(*key));
- populate_base_prog_key(devinfo, flags, &key->base);
+ populate_base_prog_key(devinfo, flags, robust_buffer_acccess, &key->base);
}
static void
populate_wm_prog_key(const struct gen_device_info *devinfo,
VkPipelineShaderStageCreateFlags flags,
+ bool robust_buffer_acccess,
const struct anv_subpass *subpass,
const VkPipelineMultisampleStateCreateInfo *ms_info,
struct brw_wm_prog_key *key)
{
memset(key, 0, sizeof(*key));
- populate_base_prog_key(devinfo, flags, &key->base);
+ populate_base_prog_key(devinfo, flags, robust_buffer_acccess, &key->base);
/* We set this to 0 here and set to the actual value before we call
* brw_compile_fs.
static void
populate_cs_prog_key(const struct gen_device_info *devinfo,
VkPipelineShaderStageCreateFlags flags,
+ bool robust_buffer_acccess,
const VkPipelineShaderStageRequiredSubgroupSizeCreateInfoEXT *rss_info,
struct brw_cs_prog_key *key)
{
memset(key, 0, sizeof(*key));
- populate_base_prog_key(devinfo, flags, &key->base);
+ populate_base_prog_key(devinfo, flags, robust_buffer_acccess, &key->base);
if (rss_info) {
assert(key->base.subgroup_size_type != BRW_SUBGROUP_SIZE_VARYING);
const struct gen_device_info *devinfo = &pipeline->base.device->info;
switch (stage) {
case MESA_SHADER_VERTEX:
- populate_vs_prog_key(devinfo, sinfo->flags, &stages[stage].key.vs);
+ populate_vs_prog_key(devinfo, sinfo->flags,
+ pipeline->base.device->robust_buffer_access,
+ &stages[stage].key.vs);
break;
case MESA_SHADER_TESS_CTRL:
populate_tcs_prog_key(devinfo, sinfo->flags,
+ pipeline->base.device->robust_buffer_access,
info->pTessellationState->patchControlPoints,
&stages[stage].key.tcs);
break;
case MESA_SHADER_TESS_EVAL:
- populate_tes_prog_key(devinfo, sinfo->flags, &stages[stage].key.tes);
+ populate_tes_prog_key(devinfo, sinfo->flags,
+ pipeline->base.device->robust_buffer_access,
+ &stages[stage].key.tes);
break;
case MESA_SHADER_GEOMETRY:
- populate_gs_prog_key(devinfo, sinfo->flags, &stages[stage].key.gs);
+ populate_gs_prog_key(devinfo, sinfo->flags,
+ pipeline->base.device->robust_buffer_access,
+ &stages[stage].key.gs);
break;
case MESA_SHADER_FRAGMENT: {
const bool raster_enabled =
!info->pRasterizationState->rasterizerDiscardEnable;
populate_wm_prog_key(devinfo, sinfo->flags,
+ pipeline->base.device->robust_buffer_access,
pipeline->subpass,
raster_enabled ? info->pMultisampleState : NULL,
&stages[stage].key.wm);
PIPELINE_SHADER_STAGE_REQUIRED_SUBGROUP_SIZE_CREATE_INFO_EXT);
populate_cs_prog_key(&pipeline->base.device->info, info->stage.flags,
+ pipeline->base.device->robust_buffer_access,
rss_info, &stage.key.cs);
ANV_FROM_HANDLE(anv_pipeline_layout, layout, info->layout);