virgl: Enable AMD_vertex_shader_(layer|viewport_index) when host supports it
authorGert Wollny <gert.wollny@collabora.com>
Wed, 22 Feb 2023 16:58:58 +0000 (17:58 +0100)
committerMarge Bot <emma+marge@anholt.net>
Thu, 16 Mar 2023 09:30:00 +0000 (09:30 +0000)
This increase the number of cases when the texture upload from buffer
can use the PBO upload code path.

v2: Fix logic combination (Corentin)

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21586>

src/gallium/drivers/virgl/virgl_screen.c
src/virtio/virtio-gpu/virgl_hw.h

index a63b7cb..2db9aef 100644 (file)
@@ -229,7 +229,8 @@ virgl_get_param(struct pipe_screen *screen, enum pipe_cap param)
    case PIPE_CAP_MIXED_COLOR_DEPTH_BITS:
       return 1;
    case PIPE_CAP_VS_LAYER_VIEWPORT:
-      return 0;
+      return (vscreen->caps.caps.v2.capability_bits_v2 & VIRGL_CAP_V2_VS_VERTEX_LAYER) &&
+            (vscreen->caps.caps.v2.capability_bits_v2 & VIRGL_CAP_V2_VS_VIEWPORT_INDEX);
    case PIPE_CAP_MAX_GEOMETRY_OUTPUT_VERTICES:
       return vscreen->caps.caps.v2.max_geom_output_vertices;
    case PIPE_CAP_MAX_GEOMETRY_TOTAL_OUTPUT_COMPONENTS:
index 97b47e0..4007fa1 100644 (file)
@@ -466,6 +466,8 @@ enum virgl_formats {
 #define VIRGL_CAP_V2_SCANOUT_USES_GBM     (1 << 8)
 #define VIRGL_CAP_V2_SSO                  (1 << 9)
 #define VIRGL_CAP_V2_TEXTURE_SHADOW_LOD   (1 << 10)
+#define VIRGL_CAP_V2_VS_VERTEX_LAYER      (1 << 11)
+#define VIRGL_CAP_V2_VS_VIEWPORT_INDEX    (1 << 12)
 /* virgl bind flags - these are compatible with mesa 10.5 gallium.
  * but are fixed, no other should be passed to virgl either.
  */