#define FLASH_VER_ID_OFFSET 0x01F0
#define WATCHDOG_CNT_LOW_OFFSET 0x0260
#define WATCHDOG_CNT_HI_OFFSET 0x0270
+#define SYNC_WRITE_OFFSET 0x0280
#define COLD_RESET_DELAY_OFFSET 0x02A0
#define DDP_DEVICE_OFFSET 0x02B0
#define MULTI_PLANE_OFFSET 0x02C0
#define FLASH_VER_ID0_REG __REG(S5P_ONENAND_BASE + FLASH_VER_ID_OFFSET)
#define WATCHDOG_CNT_LOW_REG __REG(S5P_ONENAND_BASE + WATCHDOG_CNT_LOW_OFFSET)
#define WATCHDOG_CNT_HI_REG __REG(S5P_ONENAND_BASE + WATCHDOG_CNT_HI_OFFSET)
+#define SYNC_WRITE_REG __REG(S5P_ONENAND_BASE + SYNC_WRITE_OFFSET)
#define COLD_RESET_DELAY_REG __REG(S5P_ONENAND_BASE + COLD_RESET_DELAY_OFFSET)
#define TRANS_MODE_REG __REG(S5P_ONENAND_BASE + TRANS_MODE_OFFSET)
#define DDP_DEVICE_REG __REG(S5P_ONENAND_BASE + DDP_DEVICE_OFFSET)