radeon/llvm: Update and fix some comments

diff --git a/src/gallium/drivers/radeon/R600ISelLowering.cpp b/src/gallium/drivers/radeon/R600ISelLowering.cpp
index 5926a08..2347ac7 100644 (file)
--- a/src/gallium/drivers/radeon/R600ISelLowering.cpp
+++ b/src/gallium/drivers/radeon/R600ISelLowering.cpp
@@ -7,7 +7,7 @@
 //
 //===----------------------------------------------------------------------===//
 //
-// Most of the DAG lowering is handled in AMDILISelLowering.cpp.  This file
+// Most of the DAG lowering is handled in AMDGPUISelLowering.cpp.  This file
 // is mostly EmitInstrWithCustomInserter().
 //
 //===----------------------------------------------------------------------===//
@@ -39,12 +39,6 @@ R600TargetLowering::R600TargetLowering(TargetMachine &TM) :
 
   setOperationAction(ISD::FSUB, MVT::f32, Expand);
 
-#if 0
-
-  setTargetDAGCombine(ISD::Constant);
-  setTargetDAGCombine(ISD::ConstantFP);
-
-#endif
 }
 
 MachineBasicBlock * R600TargetLowering::EmitInstrWithCustomInserter(

diff --git a/src/gallium/drivers/radeon/SIISelLowering.cpp b/src/gallium/drivers/radeon/SIISelLowering.cpp
index 1cdcd36..c8a0e0b 100644 (file)
--- a/src/gallium/drivers/radeon/SIISelLowering.cpp
+++ b/src/gallium/drivers/radeon/SIISelLowering.cpp
@@ -7,7 +7,7 @@
 //
 //===----------------------------------------------------------------------===//
 //
-// Most of the DAG lowering is handled in AMDILISelLowering.cpp.  This file is
+// Most of the DAG lowering is handled in AMDGPUISelLowering.cpp.  This file is
 // mostly EmitInstrWithCustomInserter().
 //
 //===----------------------------------------------------------------------===//
@@ -61,8 +61,8 @@ MachineBasicBlock * SITargetLowering::EmitInstrWithCustomInserter(
     BuildMI(*BB, I, BB->findDebugLoc(I), TII->get(AMDIL::V_MOV_B32_e64))
            .addOperand(MI->getOperand(0))
            .addOperand(MI->getOperand(1))
-          /* VSRC1-2 are unused, but we still need to fill all the
-           * operand slots, so we just reuse the VSRC0 operand */
+           // VSRC1-2 are unused, but we still need to fill all the
+           // operand slots, so we just reuse the VSRC0 operand
            .addOperand(MI->getOperand(1))
            .addOperand(MI->getOperand(1))
            .addImm(0) // ABS
@@ -76,8 +76,8 @@ MachineBasicBlock * SITargetLowering::EmitInstrWithCustomInserter(
     BuildMI(*BB, I, BB->findDebugLoc(I), TII->get(AMDIL::V_MOV_B32_e64))
                  .addOperand(MI->getOperand(0))
                  .addOperand(MI->getOperand(1))
-                /* VSRC1-2 are unused, but we still need to fill all the
-                 * operand slots, so we just reuse the VSRC0 operand */
+                 // VSRC1-2 are unused, but we still need to fill all the
+                 // operand slots, so we just reuse the VSRC0 operand
                  .addOperand(MI->getOperand(1))
                  .addOperand(MI->getOperand(1))
                  .addImm(1) // ABS