clk: qcom: dispcc-sm8250: Add missing EDP clocks for sm8350

SM8350 supports embedded displayport, but the clocks for this
were previously not accounted for.

Signed-off-by: Robert Foss <robert.foss@linaro.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221102090140.965450-5-robert.foss@linaro.org

diff --git a/drivers/clk/qcom/dispcc-sm8250.c b/drivers/clk/qcom/dispcc-sm8250.c
index a760658..d2aaa44 100644 (file)
--- a/drivers/clk/qcom/dispcc-sm8250.c
+++ b/drivers/clk/qcom/dispcc-sm8250.c
@@ -462,6 +462,20 @@ static struct clk_branch disp_cc_mdss_edp_link_clk = {
        },
 };
 
+static struct clk_regmap_div disp_cc_mdss_edp_link_div_clk_src = {
+       .reg = 0x2288,
+       .shift = 0,
+       .width = 2,
+       .clkr.hw.init = &(struct clk_init_data) {
+               .name = "disp_cc_mdss_edp_link_div_clk_src",
+               .parent_hws = (const struct clk_hw*[]){
+                       &disp_cc_mdss_edp_link_clk_src.clkr.hw,
+               },
+               .num_parents = 1,
+               .ops = &clk_regmap_div_ro_ops,
+       },
+};
+
 static struct clk_branch disp_cc_mdss_edp_link_intf_clk = {
        .halt_reg = 0x2074,
        .halt_check = BRANCH_HALT,
@@ -471,7 +485,7 @@ static struct clk_branch disp_cc_mdss_edp_link_intf_clk = {
                .hw.init = &(struct clk_init_data){
                        .name = "disp_cc_mdss_edp_link_intf_clk",
                        .parent_hws = (const struct clk_hw*[]){
-                               &disp_cc_mdss_edp_link_clk_src.clkr.hw,
+                               &disp_cc_mdss_edp_link_div_clk_src.clkr.hw,
                        },
                        .num_parents = 1,
                        .flags = CLK_GET_RATE_NOCACHE,
@@ -1175,6 +1189,7 @@ static struct clk_regmap *disp_cc_sm8250_clocks[] = {
        [DISP_CC_MDSS_EDP_GTC_CLK_SRC] = &disp_cc_mdss_edp_gtc_clk_src.clkr,
        [DISP_CC_MDSS_EDP_LINK_CLK] = &disp_cc_mdss_edp_link_clk.clkr,
        [DISP_CC_MDSS_EDP_LINK_CLK_SRC] = &disp_cc_mdss_edp_link_clk_src.clkr,
+       [DISP_CC_MDSS_EDP_LINK_DIV_CLK_SRC] = &disp_cc_mdss_edp_link_div_clk_src.clkr,
        [DISP_CC_MDSS_EDP_LINK_INTF_CLK] = &disp_cc_mdss_edp_link_intf_clk.clkr,
        [DISP_CC_MDSS_EDP_PIXEL_CLK] = &disp_cc_mdss_edp_pixel_clk.clkr,
        [DISP_CC_MDSS_EDP_PIXEL_CLK_SRC] = &disp_cc_mdss_edp_pixel_clk_src.clkr,
@@ -1285,7 +1300,11 @@ static int disp_cc_sm8250_probe(struct platform_device *pdev)
                        &disp_cc_mdss_dp_pixel1_clk_src,
                        &disp_cc_mdss_dp_pixel2_clk_src,
                        &disp_cc_mdss_dp_pixel_clk_src,
+                       &disp_cc_mdss_edp_aux_clk_src,
+                       &disp_cc_mdss_edp_link_clk_src,
+                       &disp_cc_mdss_edp_pixel_clk_src,
                        &disp_cc_mdss_esc0_clk_src,
+                       &disp_cc_mdss_esc1_clk_src,
                        &disp_cc_mdss_mdp_clk_src,
                        &disp_cc_mdss_pclk0_clk_src,
                        &disp_cc_mdss_pclk1_clk_src,
@@ -1297,6 +1316,7 @@ static int disp_cc_sm8250_probe(struct platform_device *pdev)
                        &disp_cc_mdss_byte1_div_clk_src,
                        &disp_cc_mdss_dp_link1_div_clk_src,
                        &disp_cc_mdss_dp_link_div_clk_src,
+                       &disp_cc_mdss_edp_link_div_clk_src,
                };
                unsigned int i;
                static bool offset_applied;