drm/radeon: add vm set_page() callback for SI
authorAlex Deucher <alexander.deucher@amd.com>
Tue, 2 Oct 2012 18:47:46 +0000 (14:47 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Tue, 2 Oct 2012 19:02:23 +0000 (15:02 -0400)
Use the new WRITE_DATA packet rather than the legacy
ME_WRITE packet.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/radeon/radeon_asic.c
drivers/gpu/drm/radeon/radeon_asic.h
drivers/gpu/drm/radeon/si.c

index 0f31c43..654520b 100644 (file)
@@ -1602,7 +1602,7 @@ static struct radeon_asic si_asic = {
                .init = &si_vm_init,
                .fini = &si_vm_fini,
                .pt_ring_index = RADEON_RING_TYPE_GFX_INDEX,
-               .set_page = &cayman_vm_set_page,
+               .set_page = &si_vm_set_page,
        },
        .ring = {
                [RADEON_RING_TYPE_GFX_INDEX] = {
index 5c823e7..5e3a0e5 100644 (file)
@@ -470,6 +470,9 @@ int si_irq_set(struct radeon_device *rdev);
 int si_irq_process(struct radeon_device *rdev);
 int si_vm_init(struct radeon_device *rdev);
 void si_vm_fini(struct radeon_device *rdev);
+void si_vm_set_page(struct radeon_device *rdev, uint64_t pe,
+                   uint64_t addr, unsigned count,
+                   uint32_t incr, uint32_t flags);
 void si_vm_flush(struct radeon_device *rdev, int ridx, struct radeon_vm *vm);
 int si_ib_parse(struct radeon_device *rdev, struct radeon_ib *ib);
 uint64_t si_get_gpu_clock(struct radeon_device *rdev);
index 3319a9a..c76825f 100644 (file)
@@ -2789,6 +2789,47 @@ void si_vm_fini(struct radeon_device *rdev)
 {
 }
 
+/**
+ * si_vm_set_page - update the page tables using the CP
+ *
+ * @rdev: radeon_device pointer
+ * @pe: addr of the page entry
+ * @addr: dst addr to write into pe
+ * @count: number of page entries to update
+ * @incr: increase next addr by incr bytes
+ * @flags: access flags
+ *
+ * Update the page tables using the CP (cayman-si).
+ */
+void si_vm_set_page(struct radeon_device *rdev, uint64_t pe,
+                   uint64_t addr, unsigned count,
+                   uint32_t incr, uint32_t flags)
+{
+       struct radeon_ring *ring = &rdev->ring[rdev->asic->vm.pt_ring_index];
+       uint32_t r600_flags = cayman_vm_page_flags(rdev, flags);
+       int i;
+       uint64_t value;
+
+       radeon_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 2 + count * 2));
+       radeon_ring_write(ring, (WRITE_DATA_ENGINE_SEL(0) |
+                                WRITE_DATA_DST_SEL(1)));
+       radeon_ring_write(ring, pe);
+       radeon_ring_write(ring, upper_32_bits(pe));
+       for (i = 0; i < count; ++i) {
+               if (flags & RADEON_VM_PAGE_SYSTEM) {
+                       value = radeon_vm_map_gart(rdev, addr);
+                       value &= 0xFFFFFFFFFFFFF000ULL;
+               } else if (flags & RADEON_VM_PAGE_VALID)
+                       value = addr;
+               else
+                       value = 0;
+               addr += incr;
+               value |= r600_flags;
+               radeon_ring_write(ring, value);
+               radeon_ring_write(ring, upper_32_bits(value));
+       }
+}
+
 void si_vm_flush(struct radeon_device *rdev, int ridx, struct radeon_vm *vm)
 {
        struct radeon_ring *ring = &rdev->ring[ridx];