iwlwifi: pcie: use WFPM_GP for debugging D3 flows
authorSara Sharon <sara.sharon@intel.com>
Wed, 28 Dec 2016 08:04:23 +0000 (10:04 +0200)
committerLuca Coelho <luciano.coelho@intel.com>
Tue, 11 Apr 2017 11:54:37 +0000 (14:54 +0300)
This register is helpful for debugging D3 issues.
Driver turns all bits on, and then on exit reads the
updated value there.

Signed-off-by: Sara Sharon <sara.sharon@intel.com>
Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
drivers/net/wireless/intel/iwlwifi/iwl-prph.h
drivers/net/wireless/intel/iwlwifi/pcie/trans.c

index 406ef30..3a8aeee 100644 (file)
 #define RADIO_REG_SYS_MANUAL_DFT_0     0xAD4078
 #define RFIC_REG_RD                    0xAD0470
 #define WFPM_CTRL_REG                  0xA03030
+#define WFPM_GP2                       0xA030B4
 enum {
        ENABLE_WFPM = BIT(31),
        WFPM_AUX_CTL_AUX_IF_MAC_OWNER_MSK       = 0x80000000,
index 69f1b03..15bf510 100644 (file)
@@ -1047,6 +1047,16 @@ static int iwl_pcie_load_given_ucode_8000(struct iwl_trans *trans,
        if (ret)
                return ret;
 
+       IWL_DEBUG_POWER(trans, "Original WFPM value = 0x%08X\n",
+                       iwl_read_prph(trans, WFPM_GP2));
+
+       /*
+        * Set default value. On resume reading the values that were
+        * zeored can provide debug data on the resume flow.
+        * This is for debugging only and has no functional impact.
+        */
+       iwl_write_prph(trans, WFPM_GP2, 0x01010101);
+
        /* configure the ucode to be ready to get the secured image */
        /* release CPU reset */
        iwl_write_prph(trans, RELEASE_CPU_RESET, RELEASE_CPU_RESET_BIT);
@@ -1527,6 +1537,9 @@ static int iwl_trans_pcie_d3_resume(struct iwl_trans *trans,
                }
        }
 
+       IWL_DEBUG_POWER(trans, "WFPM value upon resume = 0x%08X\n",
+                       iwl_read_prph(trans, WFPM_GP2));
+
        val = iwl_read32(trans, CSR_RESET);
        if (val & CSR_RESET_REG_FLAG_NEVO_RESET)
                *status = IWL_D3_STATUS_RESET;