soc: renesas: r8a77980-sysc: Correct A3VIP[012] power domain hierarchy

[ Upstream commit 160bfa7c724b348a90a12dd9694f351927a15b8e ]

The R-Car Gen3 HardWare Manual Errata for Rev. 0.80 (Feb 28, 2018)
renamed the A3VIP power domain on R-Car V3H to A3VIP0, and clarified the
power domain hierarchy for the A3VIP[012] power domains.

As the definition for the A3VIP0 domain is not yet used from DT, it can
just be renamed.

Fixes: 7755b40d07a8dba7 ("dt-bindings: power: add R8A77980 SYSC power domain definitions")
Fixes: 41d6d8bd8ae94ca9 ("soc: renesas: rcar-sysc: add R8A77980 support")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Sasha Levin <sashal@kernel.org>

diff --git a/drivers/soc/renesas/r8a77980-sysc.c b/drivers/soc/renesas/r8a77980-sysc.c
index dbb2621..a8dbe55 100644 (file)
--- a/drivers/soc/renesas/r8a77980-sysc.c
+++ b/drivers/soc/renesas/r8a77980-sysc.c
@@ -41,9 +41,9 @@ static const struct rcar_sysc_area r8a77980_areas[] __initconst = {
        { "a2dp0",      0x400, 11, R8A77980_PD_A2DP0,   R8A77980_PD_A3IR },
        { "a2dp1",      0x400, 12, R8A77980_PD_A2DP1,   R8A77980_PD_A3IR },
        { "a2cn",       0x400, 13, R8A77980_PD_A2CN,    R8A77980_PD_A3IR },
-       { "a3vip",      0x2c0, 0, R8A77980_PD_A3VIP,    R8A77980_PD_ALWAYS_ON },
-       { "a3vip1",     0x300, 0, R8A77980_PD_A3VIP1,   R8A77980_PD_A3VIP },
-       { "a3vip2",     0x280, 0, R8A77980_PD_A3VIP2,   R8A77980_PD_A3VIP },
+       { "a3vip0",     0x2c0, 0, R8A77980_PD_A3VIP0,   R8A77980_PD_ALWAYS_ON },
+       { "a3vip1",     0x300, 0, R8A77980_PD_A3VIP1,   R8A77980_PD_ALWAYS_ON },
+       { "a3vip2",     0x280, 0, R8A77980_PD_A3VIP2,   R8A77980_PD_ALWAYS_ON },
 };
 
 const struct rcar_sysc_info r8a77980_sysc_info __initconst = {

diff --git a/include/dt-bindings/power/r8a77980-sysc.h b/include/dt-bindings/power/r8a77980-sysc.h
index 7bebe7e..e12c858 100644 (file)
--- a/include/dt-bindings/power/r8a77980-sysc.h
+++ b/include/dt-bindings/power/r8a77980-sysc.h
@@ -22,7 +22,7 @@
 #define R8A77980_PD_CA53_CPU2          7
 #define R8A77980_PD_CA53_CPU3          8
 #define R8A77980_PD_A2CN               10
-#define R8A77980_PD_A3VIP              11
+#define R8A77980_PD_A3VIP0             11
 #define R8A77980_PD_A2IR5              12
 #define R8A77980_PD_CR7                        13
 #define R8A77980_PD_A2IR4              15