drm/amd/display: disable timing sync b/w odm halves

Fix for a bug where we would try to timing sync 2 odm halves.

Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/display/dc/core/dc.c b/drivers/gpu/drm/amd/display/dc/core/dc.c
index 40848eda44d9245dbd10aa01eae4a6f6a0dec71d..795766cb27dd29d428e01783237d116d6d2f1780 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/core/dc.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc.c
@@ -1333,7 +1333,9 @@ static void program_timing_sync(
        struct pipe_ctx *unsynced_pipes[MAX_PIPES] = { NULL };
 
        for (i = 0; i < pipe_count; i++) {
-               if (!ctx->res_ctx.pipe_ctx[i].stream || ctx->res_ctx.pipe_ctx[i].top_pipe)
+               if (!ctx->res_ctx.pipe_ctx[i].stream
+                               || ctx->res_ctx.pipe_ctx[i].top_pipe
+                               || ctx->res_ctx.pipe_ctx[i].prev_odm_pipe)
                        continue;
 
                unsynced_pipes[i] = &ctx->res_ctx.pipe_ctx[i];