LLVMValueRef offset = get_src(ctx, instr->src[1]);
int num_components = instr->num_components;
+ assert(instr->dest.ssa.bit_size >= 32 && instr->dest.ssa.bit_size % 32 == 0);
+
if (ctx->abi->load_ubo)
rsrc = ctx->abi->load_ubo(ctx->abi, rsrc);
- /* Convert to a scalar 32-bit load. */
+ /* Convert to a 32-bit load. */
if (instr->dest.ssa.bit_size == 64)
num_components *= 2;
- else if (instr->dest.ssa.bit_size == 16)
- num_components = DIV_ROUND_UP(num_components, 2);
- else if (instr->dest.ssa.bit_size == 8)
- num_components = DIV_ROUND_UP(num_components, 4);
-
- ret =
- ac_build_buffer_load(&ctx->ac, rsrc, num_components, NULL, offset, NULL,
- ctx->ac.f32, 0, true, true);
-
- /* Convert to the original type. */
- if (instr->dest.ssa.bit_size == 64) {
- ret = LLVMBuildBitCast(ctx->ac.builder, ret,
- LLVMVectorType(ctx->ac.i64, num_components / 2), "");
- } else if (instr->dest.ssa.bit_size == 16) {
- ret = LLVMBuildBitCast(ctx->ac.builder, ret,
- LLVMVectorType(ctx->ac.i16, num_components * 2), "");
- } else if (instr->dest.ssa.bit_size == 8) {
- ret = LLVMBuildBitCast(ctx->ac.builder, ret,
- LLVMVectorType(ctx->ac.i8, num_components * 4), "");
- }
- ret = ac_trim_vector(&ctx->ac, ret, instr->num_components);
+ ret = ac_build_buffer_load(&ctx->ac, rsrc, num_components, NULL, offset, NULL,
+ ctx->ac.f32, 0, true, true);
ret = LLVMBuildBitCast(ctx->ac.builder, ret, get_def_type(ctx, &instr->dest.ssa), "");
return exit_waterfall(ctx, &wctx, ret);
}
}
+ NIR_PASS(_, stage->nir, ac_nir_lower_subdword_loads,
+ (ac_nir_lower_subdword_options) {
+ .modes_1_comp = nir_var_mem_ubo,
+ .modes_N_comps = nir_var_mem_ubo
+ });
+
progress = false;
NIR_PASS(progress, stage->nir, nir_vk_lower_ycbcr_tex, ycbcr_conversion_lookup, pipeline_layout);
/* Gather info in the case that nir_vk_lower_ycbcr_tex might have emitted resinfo instructions. */
#include "nir_builder.h"
#include "nir_xfb_info.h"
#include "si_pipe.h"
+#include "ac_nir.h"
static bool si_alu_to_scalar_filter(const nir_instr *instr, const void *data)
nir_lower_io_passes(nir);
+ NIR_PASS_V(nir, ac_nir_lower_subdword_loads,
+ (ac_nir_lower_subdword_options) {
+ .modes_1_comp = nir_var_mem_ubo,
+ .modes_N_comps = nir_var_mem_ubo
+ });
NIR_PASS_V(nir, nir_lower_explicit_io, nir_var_mem_shared, nir_address_format_32bit_offset);
/* Remove dead derefs, so that we can remove uniforms. */