r600g: Store kcache settings as an array.
authorHenri Verbeet <hverbeet@gmail.com>
Fri, 7 Jan 2011 16:06:11 +0000 (17:06 +0100)
committerHenri Verbeet <hverbeet@gmail.com>
Fri, 7 Jan 2011 17:21:12 +0000 (18:21 +0100)
src/gallium/drivers/r600/eg_asm.c
src/gallium/drivers/r600/r600_asm.c
src/gallium/drivers/r600/r600_asm.h

index b79875c..c44506c 100644 (file)
@@ -37,13 +37,13 @@ int eg_bc_cf_build(struct r600_bc *bc, struct r600_bc_cf *cf)
        case (EG_V_SQ_CF_ALU_WORD1_SQ_CF_INST_ALU << 3):
        case (EG_V_SQ_CF_ALU_WORD1_SQ_CF_INST_ALU_PUSH_BEFORE << 3):
                bc->bytecode[id++] = S_SQ_CF_ALU_WORD0_ADDR(cf->addr >> 1) |
-                       S_SQ_CF_ALU_WORD0_KCACHE_MODE0(cf->kcache0_mode) |
-                       S_SQ_CF_ALU_WORD0_KCACHE_BANK0(cf->kcache0_bank) |
-                       S_SQ_CF_ALU_WORD0_KCACHE_BANK1(cf->kcache1_bank);
+                       S_SQ_CF_ALU_WORD0_KCACHE_MODE0(cf->kcache[0].mode) |
+                       S_SQ_CF_ALU_WORD0_KCACHE_BANK0(cf->kcache[0].bank) |
+                       S_SQ_CF_ALU_WORD0_KCACHE_BANK1(cf->kcache[1].bank);
                bc->bytecode[id++] = S_SQ_CF_ALU_WORD1_CF_INST(cf->inst >> 3) |
-                       S_SQ_CF_ALU_WORD1_KCACHE_MODE1(cf->kcache1_mode) |
-                       S_SQ_CF_ALU_WORD1_KCACHE_ADDR0(cf->kcache0_addr) |
-                       S_SQ_CF_ALU_WORD1_KCACHE_ADDR1(cf->kcache1_addr) |
+                       S_SQ_CF_ALU_WORD1_KCACHE_MODE1(cf->kcache[1].mode) |
+                       S_SQ_CF_ALU_WORD1_KCACHE_ADDR0(cf->kcache[0].addr) |
+                       S_SQ_CF_ALU_WORD1_KCACHE_ADDR1(cf->kcache[1].addr) |
                                        S_SQ_CF_ALU_WORD1_BARRIER(1) |
                                        S_SQ_CF_ALU_WORD1_COUNT((cf->ndw / 2) - 1);
                break;
index 9b9f033..58d88cf 100644 (file)
@@ -481,14 +481,14 @@ int r600_bc_add_alu_type(struct r600_bc *bc, const struct r600_bc_alu *alu, int
         * to be broken down into multiple ALU clauses.
         */
        /* select the constant buffer (0-15) for each kcache */
-       bc->cf_last->kcache0_bank = 0;
-       bc->cf_last->kcache1_bank = 0;
+       bc->cf_last->kcache[0].bank = 0;
+       bc->cf_last->kcache[1].bank = 0;
        /* lock 2 cachelines per kcache; 4 total */
-       bc->cf_last->kcache0_mode = V_SQ_CF_KCACHE_LOCK_2;
-       bc->cf_last->kcache1_mode = V_SQ_CF_KCACHE_LOCK_2;
+       bc->cf_last->kcache[0].mode = V_SQ_CF_KCACHE_LOCK_2;
+       bc->cf_last->kcache[1].mode = V_SQ_CF_KCACHE_LOCK_2;
        /* set the cacheline offsets for each kcache */
-       bc->cf_last->kcache0_addr = 0;
-       bc->cf_last->kcache1_addr = 2;
+       bc->cf_last->kcache[0].addr = 0;
+       bc->cf_last->kcache[1].addr = 2;
 
        /* process cur ALU instructions for bank swizzle */
        if (alu->last) {
@@ -748,14 +748,14 @@ static int r600_bc_cf_build(struct r600_bc *bc, struct r600_bc_cf *cf)
        case (V_SQ_CF_ALU_WORD1_SQ_CF_INST_ALU << 3):
        case (V_SQ_CF_ALU_WORD1_SQ_CF_INST_ALU_PUSH_BEFORE << 3):
                bc->bytecode[id++] = S_SQ_CF_ALU_WORD0_ADDR(cf->addr >> 1) |
-                       S_SQ_CF_ALU_WORD0_KCACHE_MODE0(cf->kcache0_mode) |
-                       S_SQ_CF_ALU_WORD0_KCACHE_BANK0(cf->kcache0_bank) |
-                       S_SQ_CF_ALU_WORD0_KCACHE_BANK1(cf->kcache1_bank);
+                       S_SQ_CF_ALU_WORD0_KCACHE_MODE0(cf->kcache[0].mode) |
+                       S_SQ_CF_ALU_WORD0_KCACHE_BANK0(cf->kcache[0].bank) |
+                       S_SQ_CF_ALU_WORD0_KCACHE_BANK1(cf->kcache[1].bank);
 
                bc->bytecode[id++] = S_SQ_CF_ALU_WORD1_CF_INST(cf->inst >> 3) |
-                       S_SQ_CF_ALU_WORD1_KCACHE_MODE1(cf->kcache1_mode) |
-                       S_SQ_CF_ALU_WORD1_KCACHE_ADDR0(cf->kcache0_addr) |
-                       S_SQ_CF_ALU_WORD1_KCACHE_ADDR1(cf->kcache1_addr) |
+                       S_SQ_CF_ALU_WORD1_KCACHE_MODE1(cf->kcache[1].mode) |
+                       S_SQ_CF_ALU_WORD1_KCACHE_ADDR0(cf->kcache[0].addr) |
+                       S_SQ_CF_ALU_WORD1_KCACHE_ADDR1(cf->kcache[1].addr) |
                                        S_SQ_CF_ALU_WORD1_BARRIER(1) |
                                        S_SQ_CF_ALU_WORD1_USES_WATERFALL(bc->chiprev == CHIPREV_R600 ? cf->r6xx_uses_waterfall : 0) |
                                        S_SQ_CF_ALU_WORD1_COUNT((cf->ndw / 2) - 1);
index b147f0f..a5504ad 100644 (file)
@@ -125,6 +125,12 @@ struct r600_bc_output {
        unsigned                        barrier;
 };
 
+struct r600_bc_kcache {
+       unsigned                        bank;
+       unsigned                        mode;
+       unsigned                        addr;
+};
+
 struct r600_bc_cf {
        struct list_head                list;
        unsigned                        inst;
@@ -134,12 +140,7 @@ struct r600_bc_cf {
        unsigned                        cond;
        unsigned                        pop_count;
        unsigned                        cf_addr; /* control flow addr */
-       unsigned                        kcache0_mode;
-       unsigned                        kcache1_mode;
-       unsigned                        kcache0_addr;
-       unsigned                        kcache1_addr;
-       unsigned                        kcache0_bank;
-       unsigned                        kcache1_bank;
+       struct r600_bc_kcache           kcache[2];
        unsigned                        r6xx_uses_waterfall;
        struct list_head                alu;
        struct list_head                tex;