ARM: dts: dra72-evm-revc: Add CMA pools and enable IPUs & DSP1 rprocs

The CMA reserved memory nodes have been added for both the IPUs and
the DSP1 remoteproc devices on the DRA72 EVM rev C board, and assigned
to the respective rproc device nodes. These match the configuration
used on the DRA72 EVM board. Both the CMA nodes and the corresponding
rproc nodes are also enabled to enable these processors on the
DRA72 EVM rev C board.

Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>

diff --git a/arch/arm/boot/dts/dra72-evm-revc.dts b/arch/arm/boot/dts/dra72-evm-revc.dts
index 2bb2e8be6276ad1f68cbd63259c7a357f530c635..6e70858f6313efcc09ad88e81b61a5dcbfa0ca22 100644 (file)
--- a/arch/arm/boot/dts/dra72-evm-revc.dts
+++ b/arch/arm/boot/dts/dra72-evm-revc.dts
@@ -14,6 +14,33 @@
                reg = <0x0 0x80000000 0x0 0x80000000>; /* 2GB */
        };
 
+       reserved-memory {
+               #address-cells = <2>;
+               #size-cells = <2>;
+               ranges;
+
+               ipu2_cma_pool: ipu2_cma@95800000 {
+                       compatible = "shared-dma-pool";
+                       reg = <0x0 0x95800000 0x0 0x3800000>;
+                       reusable;
+                       status = "okay";
+               };
+
+               dsp1_cma_pool: dsp1_cma@99000000 {
+                       compatible = "shared-dma-pool";
+                       reg = <0x0 0x99000000 0x0 0x4000000>;
+                       reusable;
+                       status = "okay";
+               };
+
+               ipu1_cma_pool: ipu1_cma@9d000000 {
+                       compatible = "shared-dma-pool";
+                       reg = <0x0 0x9d000000 0x0 0x2000000>;
+                       reusable;
+                       status = "okay";
+               };
+       };
+
        evm_1v8_sw: fixedregulator-evm_1v8 {
                compatible = "regulator-fixed";
                regulator-name = "evm_1v8";
@@ -113,3 +140,18 @@
        pinctrl-3 = <&mmc2_pins_hs200 &mmc2_iodelay_hs200_rev20_conf>;
        vmmc-supply = <&evm_1v8_sw>;
 };
+
+&ipu2 {
+       status = "okay";
+       memory-region = <&ipu2_cma_pool>;
+};
+
+&ipu1 {
+       status = "okay";
+       memory-region = <&ipu1_cma_pool>;
+};
+
+&dsp1 {
+       status = "okay";
+       memory-region = <&dsp1_cma_pool>;
+};