ah->eep_ops->get_num_ant_config(ah, ATH9K_HAL_FREQ_BAND_2GHZ);
if (AR_SREV_9280_10_OR_LATER(ah) && btcoex_enable) {
- pCap->hw_caps |= ATH9K_HW_CAP_BT_COEX;
btcoex_info->btactive_gpio = ATH_BTACTIVE_GPIO;
btcoex_info->wlanactive_gpio = ATH_WLANACTIVE_GPIO;
ATH9K_HW_CAP_ENHANCEDPM = BIT(14),
ATH9K_HW_CAP_AUTOSLEEP = BIT(15),
ATH9K_HW_CAP_4KB_SPLITTRANS = BIT(16),
- ATH9K_HW_CAP_BT_COEX = BIT(17)
};
enum ath9k_capability_type {
void ath_update_chainmask(struct ath_softc *sc, int is_ht)
{
if ((sc->sc_flags & SC_OP_SCANNING) || is_ht ||
- (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_BT_COEX)) {
+ (sc->btcoex_info.btcoex_scheme != ATH_BTCOEX_CFG_NONE)) {
sc->tx_chainmask = sc->sc_ah->caps.tx_chainmask;
sc->rx_chainmask = sc->sc_ah->caps.rx_chainmask;
} else {
ARRAY_SIZE(ath9k_5ghz_chantable);
}
- if ((ah->caps.hw_caps & ATH9K_HW_CAP_BT_COEX) &&
- (sc->btcoex_info.btcoex_scheme == ATH_BTCOEX_CFG_2WIRE))
+ if (sc->btcoex_info.btcoex_scheme == ATH_BTCOEX_CFG_2WIRE)
ath9k_hw_btcoex_init(ah);
return 0;
ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
- if ((sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_BT_COEX) &&
- (sc->btcoex_info.btcoex_scheme == ATH_BTCOEX_CFG_2WIRE) &&
+ if ((sc->btcoex_info.btcoex_scheme == ATH_BTCOEX_CFG_2WIRE) &&
!(sc->sc_flags & SC_OP_BTCOEX_ENABLED))
ath9k_hw_btcoex_enable(sc->sc_ah);