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ASoC: rt5670: improve PLL function's stability
author
Bard Liao
<bardliao@realtek.com>
Thu, 17 May 2018 05:54:08 +0000
(13:54 +0800)
committer
Mark Brown
<broonie@kernel.org>
Thu, 17 May 2018 17:10:41 +0000
(18:10 +0100)
Set PR-38 register to 0x1fe1 will make PLL function more stable.
Signed-off-by: Bard Liao <bardliao@realtek.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
sound/soc/codecs/rt5670.c
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diff --git
a/sound/soc/codecs/rt5670.c
b/sound/soc/codecs/rt5670.c
index dc7df337d5f83dfee936a1380d68173f44b64692..732ef928b25d9c729772f96060a4bb852678572e 100644
(file)
--- a/
sound/soc/codecs/rt5670.c
+++ b/
sound/soc/codecs/rt5670.c
@@
-71,7
+71,7
@@
static const struct regmap_range_cfg rt5670_ranges[] = {
static const struct reg_sequence init_list[] = {
{ RT5670_PR_BASE + 0x14, 0x9a8a },
- { RT5670_PR_BASE + 0x38, 0x
3ba
1 },
+ { RT5670_PR_BASE + 0x38, 0x
1fe
1 },
{ RT5670_PR_BASE + 0x3d, 0x3640 },
{ 0x8a, 0x0123 },
};