Revert "thermal: exynos: Set MUX bits in tmu's control register to work correctly."
authorJonghwa Lee <jonghwa3.lee@samsung.com>
Mon, 4 Nov 2013 07:12:26 +0000 (16:12 +0900)
committerMarek Szyprowski <m.szyprowski@samsung.com>
Thu, 15 May 2014 05:25:23 +0000 (07:25 +0200)
This reverts commit e612d47f36eb9eb90ee88fd11addfe5aac8cdae4.
This will be suppported later with Lukasz's pathches.

Signed-off-by : Jonghwa Lee <jonghwa3.lee@samsung.com>

drivers/thermal/samsung/exynos_tmu.c
drivers/thermal/samsung/exynos_tmu_data.h

index fa6631a..b43afda 100644 (file)
@@ -322,16 +322,6 @@ static void exynos_tmu_control(struct platform_device *pdev, bool on)
                con |= pdata->reference_voltage << reg->buf_vref_sel_shift;
        }
 
-       /*
-        * In Exynos 4x12 and 5250,
-        * MUX bits should be set to 0x6 for normal operation.
-        * For ohters, it can be ignored.
-        */
-       if (pdata->type == SOC_ARCH_EXYNOS) {
-               con &= ~(EXYNOS_TMU_MUX_ADDR_MASK << EXYNOS_TMU_MUX_ADDR_SHIFT);
-               con |= EXYNOS_TMU_MUX_ADDR_DEFAULT << EXYNOS_TMU_MUX_ADDR_SHIFT;
-       }
-
        if (pdata->gain) {
                con &= ~(reg->buf_slope_sel_mask << reg->buf_slope_sel_shift);
                con |= (pdata->gain << reg->buf_slope_sel_shift);
index 2144eaf..dc7feb5 100644 (file)
@@ -35,9 +35,6 @@
 #define EXYNOS_TMU_TEMP_MASK           0xff
 #define EXYNOS_TMU_REF_VOLTAGE_SHIFT   24
 #define EXYNOS_TMU_REF_VOLTAGE_MASK    0x1f
-#define EXYNOS_TMU_MUX_ADDR_DEFAULT    0x6
-#define EXYNOS_TMU_MUX_ADDR_MASK       0x7
-#define EXYNOS_TMU_MUX_ADDR_SHIFT      20
 #define EXYNOS_TMU_BUF_SLOPE_SEL_MASK  0xf
 #define EXYNOS_TMU_BUF_SLOPE_SEL_SHIFT 8
 #define EXYNOS_TMU_CORE_EN_SHIFT       0