drm/amd/powerplay: avoid calling SMU10 specific SMU message implemention

Prepare for coming lock protection for SMU message issuing.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Kenneth Feng <kenneth.feng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/powerplay/smumgr/smu10_smumgr.c b/drivers/gpu/drm/amd/powerplay/smumgr/smu10_smumgr.c
index 2319400..d652673 100644 (file)
--- a/drivers/gpu/drm/amd/powerplay/smumgr/smu10_smumgr.c
+++ b/drivers/gpu/drm/amd/powerplay/smumgr/smu10_smumgr.c
@@ -126,13 +126,13 @@ static int smu10_copy_table_from_smc(struct pp_hwmgr *hwmgr,
                        "Invalid SMU Table version!", return -EINVAL;);
        PP_ASSERT_WITH_CODE(priv->smu_tables.entry[table_id].size != 0,
                        "Invalid SMU Table Length!", return -EINVAL;);
-       smu10_send_msg_to_smc_with_parameter(hwmgr,
+       smum_send_msg_to_smc_with_parameter(hwmgr,
                        PPSMC_MSG_SetDriverDramAddrHigh,
                        upper_32_bits(priv->smu_tables.entry[table_id].mc_addr));
-       smu10_send_msg_to_smc_with_parameter(hwmgr,
+       smum_send_msg_to_smc_with_parameter(hwmgr,
                        PPSMC_MSG_SetDriverDramAddrLow,
                        lower_32_bits(priv->smu_tables.entry[table_id].mc_addr));
-       smu10_send_msg_to_smc_with_parameter(hwmgr,
+       smum_send_msg_to_smc_with_parameter(hwmgr,
                        PPSMC_MSG_TransferTableSmu2Dram,
                        priv->smu_tables.entry[table_id].table_id);
 
@@ -164,13 +164,13 @@ static int smu10_copy_table_to_smc(struct pp_hwmgr *hwmgr,
 
        amdgpu_asic_flush_hdp(adev, NULL);
 
-       smu10_send_msg_to_smc_with_parameter(hwmgr,
+       smum_send_msg_to_smc_with_parameter(hwmgr,
                        PPSMC_MSG_SetDriverDramAddrHigh,
                        upper_32_bits(priv->smu_tables.entry[table_id].mc_addr));
-       smu10_send_msg_to_smc_with_parameter(hwmgr,
+       smum_send_msg_to_smc_with_parameter(hwmgr,
                        PPSMC_MSG_SetDriverDramAddrLow,
                        lower_32_bits(priv->smu_tables.entry[table_id].mc_addr));
-       smu10_send_msg_to_smc_with_parameter(hwmgr,
+       smum_send_msg_to_smc_with_parameter(hwmgr,
                        PPSMC_MSG_TransferTableDram2Smu,
                        priv->smu_tables.entry[table_id].table_id);
 
@@ -181,9 +181,9 @@ static int smu10_verify_smc_interface(struct pp_hwmgr *hwmgr)
 {
        uint32_t smc_driver_if_version;
 
-       smu10_send_msg_to_smc(hwmgr,
+       smum_send_msg_to_smc(hwmgr,
                        PPSMC_MSG_GetDriverIfVersion);
-       smc_driver_if_version = smu10_read_arg_from_smc(hwmgr);
+       smc_driver_if_version = smum_get_argument(hwmgr);
 
        if ((smc_driver_if_version != SMU10_DRIVER_IF_VERSION) &&
            (smc_driver_if_version != SMU10_DRIVER_IF_VERSION + 1)) {
@@ -218,7 +218,7 @@ static int smu10_start_smu(struct pp_hwmgr *hwmgr)
        struct amdgpu_device *adev = hwmgr->adev;
 
        smum_send_msg_to_smc(hwmgr, PPSMC_MSG_GetSmuVersion);
-       hwmgr->smu_version = smu10_read_arg_from_smc(hwmgr);
+       hwmgr->smu_version = smum_get_argument(hwmgr);
        adev->pm.fw_version = hwmgr->smu_version >> 8;
 
        if (adev->rev_id < 0x8 && adev->pdev->device != 0x15d8 &&