RISC-V: Remove udivdi3

This should never have landed in the first place: it was added as part
of 64-bit divide support for 32-bit systems, but the kernel doesn't
allow this sort of division.  I must have forgotten to remove it.

This patch removes the support.  Since this routine only worked on
64-bit platforms but was only built on 32-bit platforms, it's
essentially just nonsense anyway.

Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
Acked-by: Nicolas Pitre <nico@fluxnic.net>
Link: https://lore.kernel.org/linux-riscv/nycvar.YSQ.7.76.1908061413360.19480@knanqh.ubzr/T/#t
Reported-by: Eric Lin <tesheng@andestech.com>
Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com>

diff --git a/arch/riscv/lib/Makefile b/arch/riscv/lib/Makefile
index 8e364eb..267feaa 100644 (file)
--- a/arch/riscv/lib/Makefile
+++ b/arch/riscv/lib/Makefile
@@ -5,5 +5,3 @@ lib-y   += memset.o
 lib-y  += uaccess.o
 
 lib-$(CONFIG_64BIT) += tishift.o
-
-lib-$(CONFIG_32BIT) += udivdi3.o

diff --git a/arch/riscv/lib/udivdi3.S b/arch/riscv/lib/udivdi3.S
deleted file mode 100644 (file)
index 3f07476..0000000
--- a/arch/riscv/lib/udivdi3.S
+++ /dev/null
@@ -1,32 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-/*
- * Copyright (C) 2016-2017 Free Software Foundation, Inc.
- */
-
-#include <linux/linkage.h>
-
-ENTRY(__udivdi3)
-       mv      a2, a1
-       mv      a1, a0
-       li      a0, -1
-       beqz    a2, .L5
-       li      a3, 1
-       bgeu    a2, a1, .L2
-.L1:
-       blez    a2, .L2
-       slli    a2, a2, 1
-       slli    a3, a3, 1
-       bgtu    a1, a2, .L1
-.L2:
-       li      a0, 0
-.L3:
-       bltu    a1, a2, .L4
-       sub     a1, a1, a2
-       or      a0, a0, a3
-.L4:
-       srli    a3, a3, 1
-       srli    a2, a2, 1
-       bnez    a3, .L3
-.L5:
-       ret
-ENDPROC(__udivdi3)