Sorry folks, but it has to be. One more of these invasive qdev patches.
We have a serious design bug in the qdev interface: device init
callbacks can't signal failure because the init() callback has no
return value. This patch fixes it.
We have already one case in-tree where this is needed:
Try -device virtio-blk-pci (without drive= specified) and watch qemu
segfault. This patch fixes it.
With usb+scsi being converted to qdev we'll get more devices where the
init callback can fail for various reasons.
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
mixer_reset (s);
}
-static void ac97_initfn (PCIDevice *dev)
+static int ac97_initfn (PCIDevice *dev)
{
AC97LinkState *s = DO_UPCAST (AC97LinkState, dev, dev);
uint8_t *c = s->dev.config;
qemu_register_reset (ac97_on_reset, s);
AUD_register_card ("ac97", &s->card);
ac97_on_reset (s);
+ return 0;
}
int ac97_init (PCIBus *bus)
return 0;
}
-static void ads7846_init(SSISlave *dev)
+static int ads7846_init(SSISlave *dev)
{
ADS7846State *s = FROM_SSI_SLAVE(ADS7846State, dev);
ads7846_int_update(s);
register_savevm("ads7846", -1, 0, ads7846_save, ads7846_load, s);
+ return 0;
}
static SSISlaveInfo ads7846_info = {
return d->host_state.bus;
}
-static void pci_pbm_init_device(SysBusDevice *dev)
+static int pci_pbm_init_device(SysBusDevice *dev)
{
APBState *s;
pci_mem_data = cpu_register_io_memory(pci_apb_read,
pci_apb_write, &s->host_state);
sysbus_init_mmio(dev, 0x10000000ULL, pci_mem_data);
+ return 0;
}
-static void pbm_pci_host_init(PCIDevice *d)
+static int pbm_pci_host_init(PCIDevice *d)
{
pci_config_set_vendor_id(d->config, PCI_VENDOR_ID_SUN);
pci_config_set_device_id(d->config, PCI_DEVICE_ID_SUN_SABRE);
pci_config_set_class(d->config, PCI_CLASS_BRIDGE_HOST);
d->config[0x0D] = 0x10; // latency_timer
d->config[PCI_HEADER_TYPE] = PCI_HEADER_TYPE_NORMAL; // header_type
+ return 0;
}
static PCIDeviceInfo pbm_pci_host_info = {
arm_sysctl_write
};
-static void arm_sysctl_init1(SysBusDevice *dev)
+static int arm_sysctl_init1(SysBusDevice *dev)
{
arm_sysctl_state *s = FROM_SYSBUS(arm_sysctl_state, dev);
int iomemtype;
arm_sysctl_writefn, s);
sysbus_init_mmio(dev, 0x1000, iomemtype);
/* ??? Save/restore. */
+ return 0;
}
/* Legacy helper function. */
return 0;
}
-static void sp804_init(SysBusDevice *dev)
+static int sp804_init(SysBusDevice *dev)
{
int iomemtype;
sp804_state *s = FROM_SYSBUS(sp804_state, dev);
sp804_writefn, s);
sysbus_init_mmio(dev, 0x1000, iomemtype);
register_savevm("sp804", -1, 1, sp804_save, sp804_load, s);
+ return 0;
}
icp_pit_write
};
-static void icp_pit_init(SysBusDevice *dev)
+static int icp_pit_init(SysBusDevice *dev)
{
int iomemtype;
icp_pit_state *s = FROM_SYSBUS(icp_pit_state, dev);
sysbus_init_mmio(dev, 0x1000, iomemtype);
/* This device has no state to save/restore. The component timers will
save themselves. */
+ return 0;
}
static void arm_timer_register_devices(void)
uint32_t base;
} BitBandState;
-static void bitband_init(SysBusDevice *dev)
+static int bitband_init(SysBusDevice *dev)
{
BitBandState *s = FROM_SYSBUS(BitBandState, dev);
int iomemtype;
iomemtype = cpu_register_io_memory(bitband_readfn, bitband_writefn,
&s->base);
sysbus_init_mmio(dev, 0x02000000, iomemtype);
+ return 0;
}
static void armv7m_bitband_init(void)
return 0;
}
-static void armv7m_nvic_init(SysBusDevice *dev)
+static int armv7m_nvic_init(SysBusDevice *dev)
{
nvic_state *s= FROM_SYSBUSGIC(nvic_state, dev);
cpu_register_physical_memory(0xe000e000, 0x1000, s->gic.iomemtype);
s->systick.timer = qemu_new_timer(vm_clock, systick_timer_tick, s);
register_savevm("armv7m_nvic", -1, 1, nvic_save, nvic_load, s);
+ return 0;
}
static void armv7m_nvic_register_devices(void)
i2c->last_clock = clock;
}
-static void bitbang_i2c_init(SysBusDevice *dev)
+static int bitbang_i2c_init(SysBusDevice *dev)
{
bitbang_i2c_interface *s = FROM_SYSBUS(bitbang_i2c_interface, dev);
i2c_bus *bus;
qdev_init_gpio_in(&dev->qdev, bitbang_i2c_gpio_set, 2);
qdev_init_gpio_out(&dev->qdev, &s->out, 1);
+
+ return 0;
}
static void bitbang_i2c_register(void)
cirrus_update_memory_access(s);
}
-static void pci_cirrus_vga_initfn(PCIDevice *dev)
+static int pci_cirrus_vga_initfn(PCIDevice *dev)
{
PCICirrusVGAState *d = DO_UPCAST(PCICirrusVGAState, dev, dev);
CirrusVGAState *s = &d->cirrus_vga;
PCI_ADDRESS_SPACE_MEM, cirrus_pci_mmio_map);
}
/* XXX: ROM BIOS */
+ return 0;
}
void pci_cirrus_vga_init(PCIBus *bus)
return 0;
}
-static void cs4231_init1(SysBusDevice *dev)
+static int cs4231_init1(SysBusDevice *dev)
{
int io;
CSState *s = FROM_SYSBUS(CSState, dev);
register_savevm("cs4231", -1, 1, cs_save, cs_load, s);
qemu_register_reset(cs_reset, s);
cs_reset(s);
+ return 0;
}
static SysBusDeviceInfo cs4231_info = {
memset(&d->tx, 0, sizeof d->tx);
}
-static void pci_e1000_init(PCIDevice *pci_dev)
+static int pci_e1000_init(PCIDevice *pci_dev)
{
E1000State *d = (E1000State *)pci_dev;
uint8_t *pci_conf;
d->dev.unregister = pci_e1000_uninit;
qemu_register_reset(e1000_reset, d);
e1000_reset(d);
+ return 0;
}
static PCIDeviceInfo e1000_info = {
s->regs[ECC_ECR1] = 0;
}
-static void ecc_init1(SysBusDevice *dev)
+static int ecc_init1(SysBusDevice *dev)
{
int ecc_io_memory;
ECCState *s = FROM_SYSBUS(ECCState, dev);
register_savevm("ECC", -1, 3, ecc_save, ecc_load, s);
qemu_register_reset(ecc_reset, s);
ecc_reset(s);
+ return 0;
}
static SysBusDeviceInfo ecc_info = {
return 0;
}
-static void nic_init(PCIDevice *pci_dev, uint32_t device)
+static int nic_init(PCIDevice *pci_dev, uint32_t device)
{
PCIEEPRO100State *d = (PCIEEPRO100State *)pci_dev;
EEPRO100State *s;
qemu_register_reset(nic_reset, s);
register_savevm(s->vc->model, -1, 3, nic_save, nic_load, s);
+ return 0;
}
-static void pci_i82551_init(PCIDevice *dev)
+static int pci_i82551_init(PCIDevice *dev)
{
- nic_init(dev, i82551);
+ return nic_init(dev, i82551);
}
-static void pci_i82557b_init(PCIDevice *dev)
+static int pci_i82557b_init(PCIDevice *dev)
{
- nic_init(dev, i82557B);
+ return nic_init(dev, i82557B);
}
-static void pci_i82559er_init(PCIDevice *dev)
+static int pci_i82559er_init(PCIDevice *dev)
{
- nic_init(dev, i82559ER);
+ return nic_init(dev, i82559ER);
}
static PCIDeviceInfo eepro100_info[] = {
es1370_reset (s);
}
-static void es1370_initfn (PCIDevice *dev)
+static int es1370_initfn (PCIDevice *dev)
{
ES1370State *s = DO_UPCAST (ES1370State, dev, dev);
uint8_t *c = s->dev.config;
AUD_register_card ("es1370", &s->card);
es1370_reset (s);
+ return 0;
}
int es1370_init (PCIBus *bus)
sysbus_mmio_map(s, 0, base);
}
-static void escc_init1(SysBusDevice *dev)
+static int escc_init1(SysBusDevice *dev)
{
SerialState *s = FROM_SYSBUS(SerialState, dev);
int io;
register_savevm("escc", -1, 2, escc_save, escc_load, s);
qemu_register_reset(escc_reset, s);
escc_reset(s);
+ return 0;
}
static SysBusDeviceInfo escc_info = {
*reset = qdev_get_gpio_in(dev, 0);
}
-static void esp_init1(SysBusDevice *dev)
+static int esp_init1(SysBusDevice *dev)
{
ESPState *s = FROM_SYSBUS(ESPState, dev);
int esp_io_memory;
qdev_init_gpio_in(&dev->qdev, parent_esp_reset, 1);
scsi_bus_new(&dev->qdev, esp_scsi_attach);
+ return 0;
}
static void esp_register_devices(void)
pic_update(fs);
}
-static void etraxfs_pic_init(SysBusDevice *dev)
+static int etraxfs_pic_init(SysBusDevice *dev)
{
struct etrax_pic *s = FROM_SYSBUS(typeof (*s), dev);
int intr_vect_regs;
intr_vect_regs = cpu_register_io_memory(pic_read, pic_write, s);
sysbus_init_mmio(dev, R_MAX * 4, intr_vect_regs);
+ return 0;
}
static SysBusDeviceInfo etraxfs_pic_info = {
}
-static void etraxfs_ser_init(SysBusDevice *dev)
+static int etraxfs_ser_init(SysBusDevice *dev)
{
struct etrax_serial *s = FROM_SYSBUS(typeof (*s), dev);
int ser_regs;
qemu_chr_add_handlers(s->chr,
serial_can_receive, serial_receive,
serial_event, s);
+ return 0;
}
static void etraxfs_serial_register(void)
qemu_irq_lower(t->irq);
}
-static void etraxfs_timer_init(SysBusDevice *dev)
+static int etraxfs_timer_init(SysBusDevice *dev)
{
struct etrax_timer *t = FROM_SYSBUS(typeof (*t), dev);
int timer_regs;
sysbus_init_mmio(dev, 0x5c, timer_regs);
qemu_register_reset(etraxfs_timer_reset, t);
+ return 0;
}
static void etraxfs_timer_register(void)
return fdctrl;
}
-static void fdctrl_init_common(fdctrl_t *fdctrl)
+static int fdctrl_init_common(fdctrl_t *fdctrl)
{
int i, j;
static int command_tables_inited = 0;
fdctrl_external_reset(fdctrl);
register_savevm("fdc", -1, 2, fdc_save, fdc_load, fdctrl);
qemu_register_reset(fdctrl_external_reset, fdctrl);
+ return 0;
}
-static void isabus_fdc_init1(ISADevice *dev)
+static int isabus_fdc_init1(ISADevice *dev)
{
fdctrl_isabus_t *isa = DO_UPCAST(fdctrl_isabus_t, busdev, dev);
fdctrl_t *fdctrl = &isa->state;
&fdctrl_write_port, fdctrl);
isa_init_irq(&isa->busdev, &fdctrl->irq);
- fdctrl_init_common(fdctrl);
+ return fdctrl_init_common(fdctrl);
}
-static void sysbus_fdc_init1(SysBusDevice *dev)
+static int sysbus_fdc_init1(SysBusDevice *dev)
{
fdctrl_t *fdctrl = &(FROM_SYSBUS(fdctrl_sysbus_t, dev)->state);
int io;
sysbus_init_irq(dev, &fdctrl->irq);
qdev_init_gpio_in(&dev->qdev, fdctrl_handle_tc, 1);
- fdctrl_init_common(fdctrl);
+ return fdctrl_init_common(fdctrl);
}
-static void sun4m_fdc_init1(SysBusDevice *dev)
+static int sun4m_fdc_init1(SysBusDevice *dev)
{
fdctrl_t *fdctrl = &(FROM_SYSBUS(fdctrl_sysbus_t, dev)->state);
int io;
qdev_init_gpio_in(&dev->qdev, fdctrl_handle_tc, 1);
fdctrl->sun4m = 1;
- fdctrl_init_common(fdctrl);
+ return fdctrl_init_common(fdctrl);
}
static ISADeviceInfo isa_fdc_info = {
return d->host_state.bus;
}
-static void pci_grackle_init_device(SysBusDevice *dev)
+static int pci_grackle_init_device(SysBusDevice *dev)
{
GrackleState *s;
int pci_mem_config, pci_mem_data;
&s->host_state);
qemu_register_reset(pci_grackle_reset, &s->host_state);
pci_grackle_reset(&s->host_state);
+ return 0;
}
-static void pci_dec_21154_init_device(SysBusDevice *dev)
+static int pci_dec_21154_init_device(SysBusDevice *dev)
{
GrackleState *s;
int pci_mem_config, pci_mem_data;
&s->host_state);
sysbus_init_mmio(dev, 0x1000, pci_mem_config);
sysbus_init_mmio(dev, 0x1000, pci_mem_data);
+ return 0;
}
-static void grackle_pci_host_init(PCIDevice *d)
+static int grackle_pci_host_init(PCIDevice *d)
{
pci_config_set_vendor_id(d->config, PCI_VENDOR_ID_MOTOROLA);
pci_config_set_device_id(d->config, PCI_DEVICE_ID_MOTOROLA_MPC106);
d->config[0x09] = 0x01;
pci_config_set_class(d->config, PCI_CLASS_BRIDGE_HOST);
d->config[PCI_HEADER_TYPE] = PCI_HEADER_TYPE_NORMAL; // header_type
+ return 0;
}
-static void dec_21154_pci_host_init(PCIDevice *d)
+static int dec_21154_pci_host_init(PCIDevice *d)
{
/* PCI2PCI bridge same values as PearPC - check this */
pci_config_set_vendor_id(d->config, PCI_VENDOR_ID_DEC);
d->config[0x25] = 0x84;
d->config[0x26] = 0x00; // prefetchable_memory_limit
d->config[0x27] = 0x85;
+ return 0;
}
static PCIDeviceInfo grackle_pci_host_info = {
}
}
-static void i2c_slave_qdev_init(DeviceState *dev, DeviceInfo *base)
+static int i2c_slave_qdev_init(DeviceState *dev, DeviceInfo *base)
{
I2CSlaveInfo *info = container_of(base, I2CSlaveInfo, qdev);
i2c_slave *s = I2C_SLAVE_FROM_QDEV(dev);
s->info = info;
- info->init(s);
+ return info->init(s);
}
void i2c_register_slave(I2CSlaveInfo *info)
/* Notify the slave of a bus state change. */
typedef void (*i2c_event_cb)(i2c_slave *s, enum i2c_event event);
-typedef void (*i2c_slave_initfn)(i2c_slave *dev);
+typedef int (*i2c_slave_initfn)(i2c_slave *dev);
typedef struct {
DeviceInfo qdev;
integratorcm_write
};
-static void integratorcm_init(SysBusDevice *dev)
+static int integratorcm_init(SysBusDevice *dev)
{
int iomemtype;
integratorcm_state *s = FROM_SYSBUS(integratorcm_state, dev);
sysbus_init_mmio(dev, 0x00800000, iomemtype);
integratorcm_do_remap(s, 1);
/* ??? Save/restore. */
+ return 0;
}
/* Integrator/CP hardware emulation. */
icp_pic_write
};
-static void icp_pic_init(SysBusDevice *dev)
+static int icp_pic_init(SysBusDevice *dev)
{
icp_pic_state *s = FROM_SYSBUS(icp_pic_state, dev);
int iomemtype;
iomemtype = cpu_register_io_memory(icp_pic_readfn,
icp_pic_writefn, s);
sysbus_init_mmio(dev, 0x00800000, iomemtype);
+ return 0;
}
/* CP control registers. */
s->regs[IOMMU_MASK_ID] = IOMMU_TS_MASK;
}
-static void iommu_init1(SysBusDevice *dev)
+static int iommu_init1(SysBusDevice *dev)
{
IOMMUState *s = FROM_SYSBUS(IOMMUState, dev);
int io;
register_savevm("iommu", -1, 2, iommu_save, iommu_load, s);
qemu_register_reset(iommu_reset, s);
iommu_reset(s);
+ return 0;
}
static SysBusDeviceInfo iommu_info = {
dev->nirqs++;
}
-static void isa_qdev_init(DeviceState *qdev, DeviceInfo *base)
+static int isa_qdev_init(DeviceState *qdev, DeviceInfo *base)
{
ISADevice *dev = DO_UPCAST(ISADevice, qdev, qdev);
ISADeviceInfo *info = DO_UPCAST(ISADeviceInfo, qdev, base);
dev->isairq[0] = -1;
dev->isairq[1] = -1;
- info->init(dev);
+
+ return info->init(dev);
}
void isa_qdev_register(ISADeviceInfo *info)
}
}
-static void isabus_bridge_init(SysBusDevice *dev)
+static int isabus_bridge_init(SysBusDevice *dev)
{
/* nothing */
+ return 0;
}
static SysBusDeviceInfo isabus_bridge_info = {
int nirqs;
};
-typedef void (*isa_qdev_initfn)(ISADevice *dev);
+typedef int (*isa_qdev_initfn)(ISADevice *dev);
struct ISADeviceInfo {
DeviceInfo qdev;
isa_qdev_initfn init;
return 0;
}
-static void lm8323_init(i2c_slave *i2c)
+static int lm8323_init(i2c_slave *i2c)
{
LM823KbdState *s = FROM_I2C_SLAVE(LM823KbdState, i2c);
qemu_register_reset((void *) lm_kbd_reset, s);
register_savevm("LM8323", -1, 0, lm_kbd_save, lm_kbd_load, s);
+ return 0;
}
void lm832x_key_event(struct i2c_slave *i2c, int key, int state)
return 0;
}
-static void lsi_scsi_init(PCIDevice *dev)
+static int lsi_scsi_init(PCIDevice *dev)
{
LSIState *s = (LSIState *)dev;
uint8_t *pci_conf;
scsi_bus_new(&dev->qdev, lsi_scsi_attach);
register_savevm("lsiscsi", -1, 0, lsi_scsi_save, lsi_scsi_load, s);
+ return 0;
}
static PCIDeviceInfo lsi_info = {
return d;
}
-static void m48t59_init1(SysBusDevice *dev)
+static int m48t59_init1(SysBusDevice *dev)
{
m48t59_t *s = FROM_SYSBUS(m48t59_t, dev);
int mem_index;
qemu_register_reset(m48t59_reset, s);
register_savevm("m48t59", -1, 1, m48t59_save, m48t59_load, s);
+ return 0;
}
static SysBusDeviceInfo m48t59_info = {
mv88w8618_audio_write
};
-static void mv88w8618_audio_init(SysBusDevice *dev)
+static int mv88w8618_audio_init(SysBusDevice *dev)
{
mv88w8618_audio_state *s = FROM_SYSBUS(mv88w8618_audio_state, dev);
int iomemtype;
sysbus_init_mmio(dev, MP_AUDIO_SIZE, iomemtype);
qemu_register_reset(mv88w8618_audio_reset, s);
+
+ return 0;
}
static SysBusDeviceInfo mv88w8618_audio_info = {
return 0;
}
-static void max111x_init(SSISlave *dev, int inputs)
+static int max111x_init(SSISlave *dev, int inputs)
{
MAX111xState *s = FROM_SSI_SLAVE(MAX111xState, dev);
s->com = 0;
register_savevm("max111x", -1, 0, max111x_save, max111x_load, s);
+ return 0;
}
-static void max1110_init(SSISlave *dev)
+static int max1110_init(SSISlave *dev)
{
- max111x_init(dev, 8);
+ return max111x_init(dev, 8);
}
-static void max1111_init(SSISlave *dev)
+static int max1111_init(SSISlave *dev)
{
- max111x_init(dev, 4);
+ return max111x_init(dev, 4);
}
void max111x_set_input(DeviceState *dev, int line, uint8_t value)
/* MAX7310 is SMBus-compatible (can be used with only SMBus protocols),
* but also accepts sequences that are not SMBus so return an I2C device. */
-static void max7310_init(i2c_slave *i2c)
+static int max7310_init(i2c_slave *i2c)
{
MAX7310State *s = FROM_I2C_SLAVE(MAX7310State, i2c);
max7310_reset(&s->i2c);
register_savevm("max7310", -1, 0, max7310_save, max7310_load, s);
+ return 0;
}
qemu_irq *max7310_gpio_in_get(i2c_slave *i2c)
cpu_register_physical_memory(base + 0x1000, 0x1000, s->gic.iomemtype);
}
-static void mpcore_priv_init(SysBusDevice *dev)
+static int mpcore_priv_init(SysBusDevice *dev)
{
mpcore_priv_state *s = FROM_SYSBUSGIC(mpcore_priv_state, dev);
int i;
for (i = 0; i < 8; i++) {
mpcore_timer_init(s, &s->timer[i], i);
}
+ return 0;
}
/* Dummy PIC to route IRQ lines. The baseboard has 4 independent IRQ
}
}
-static void realview_mpcore_init(SysBusDevice *dev)
+static int realview_mpcore_init(SysBusDevice *dev)
{
mpcore_rirq_state *s = FROM_SYSBUS(mpcore_rirq_state, dev);
DeviceState *gic;
}
}
qdev_init_gpio_in(&dev->qdev, mpcore_rirq_set_irq, 64);
+ return 0;
}
static void mpcore_register_devices(void)
qemu_free(s);
}
-static void mv88w8618_eth_init(SysBusDevice *dev)
+static int mv88w8618_eth_init(SysBusDevice *dev)
{
mv88w8618_eth_state *s = FROM_SYSBUS(mv88w8618_eth_state, dev);
s->mmio_index = cpu_register_io_memory(mv88w8618_eth_readfn,
mv88w8618_eth_writefn, s);
sysbus_init_mmio(dev, MP_ETH_SIZE, s->mmio_index);
+ return 0;
}
/* LCD register offsets */
musicpal_lcd_write
};
-static void musicpal_lcd_init(SysBusDevice *dev)
+static int musicpal_lcd_init(SysBusDevice *dev)
{
musicpal_lcd_state *s = FROM_SYSBUS(musicpal_lcd_state, dev);
int iomemtype;
qemu_console_resize(s->ds, 128*3, 64*3);
qdev_init_gpio_in(&dev->qdev, musicpal_lcd_gpio_brigthness_in, 3);
+
+ return 0;
}
/* PIC register offsets */
mv88w8618_pic_write
};
-static void mv88w8618_pic_init(SysBusDevice *dev)
+static int mv88w8618_pic_init(SysBusDevice *dev)
{
mv88w8618_pic_state *s = FROM_SYSBUS(mv88w8618_pic_state, dev);
int iomemtype;
sysbus_init_mmio(dev, MP_PIC_SIZE, iomemtype);
qemu_register_reset(mv88w8618_pic_reset, s);
+ return 0;
}
/* PIT register offsets */
mv88w8618_pit_write
};
-static void mv88w8618_pit_init(SysBusDevice *dev)
+static int mv88w8618_pit_init(SysBusDevice *dev)
{
int iomemtype;
mv88w8618_pit_state *s = FROM_SYSBUS(mv88w8618_pit_state, dev);
iomemtype = cpu_register_io_memory(mv88w8618_pit_readfn,
mv88w8618_pit_writefn, s);
sysbus_init_mmio(dev, MP_PIT_SIZE, iomemtype);
+ return 0;
}
/* Flash config register offsets */
mv88w8618_flashcfg_write
};
-static void mv88w8618_flashcfg_init(SysBusDevice *dev)
+static int mv88w8618_flashcfg_init(SysBusDevice *dev)
{
int iomemtype;
mv88w8618_flashcfg_state *s = FROM_SYSBUS(mv88w8618_flashcfg_state, dev);
iomemtype = cpu_register_io_memory(mv88w8618_flashcfg_readfn,
mv88w8618_flashcfg_writefn, s);
sysbus_init_mmio(dev, MP_FLASHCFG_SIZE, iomemtype);
+ return 0;
}
/* Misc register offsets */
mv88w8618_wlan_write,
};
-static void mv88w8618_wlan_init(SysBusDevice *dev)
+static int mv88w8618_wlan_init(SysBusDevice *dev)
{
int iomemtype;
iomemtype = cpu_register_io_memory(mv88w8618_wlan_readfn,
mv88w8618_wlan_writefn, NULL);
sysbus_init_mmio(dev, MP_WLAN_SIZE, iomemtype);
+ return 0;
}
/* GPIO register offsets */
s->isr = 0;
}
-static void musicpal_gpio_init(SysBusDevice *dev)
+static int musicpal_gpio_init(SysBusDevice *dev)
{
musicpal_gpio_state *s = FROM_SYSBUS(musicpal_gpio_state, dev);
int iomemtype;
qdev_init_gpio_out(&dev->qdev, s->out, 5);
/* 10 gpio button input + 1 I2C data input */
qdev_init_gpio_in(&dev->qdev, musicpal_gpio_irq, 11);
+
+ return 0;
}
/* Keyboard codes & masks */
s->kbd_extended = 0;
}
-static void musicpal_key_init(SysBusDevice *dev)
+static int musicpal_key_init(SysBusDevice *dev)
{
musicpal_key_state *s = FROM_SYSBUS(musicpal_key_state, dev);
qdev_init_gpio_out(&dev->qdev, s->out, 10);
qemu_add_kbd_event_handler(musicpal_key_event, s);
+
+ return 0;
}
static struct arm_boot_info musicpal_binfo = {
unregister_savevm("ne2000", s);
}
-static void pci_ne2000_init(PCIDevice *pci_dev)
+static int pci_ne2000_init(PCIDevice *pci_dev)
{
PCINE2000State *d = (PCINE2000State *)pci_dev;
NE2000State *s;
qemu_format_nic_info_str(s->vc, s->macaddr);
register_savevm("ne2000", -1, 3, ne2000_save, ne2000_load, s);
+ return 0;
}
static PCIDeviceInfo ne2000_info = {
return s->bus;
}
-static void pci_qdev_init(DeviceState *qdev, DeviceInfo *base)
+static int pci_qdev_init(DeviceState *qdev, DeviceInfo *base)
{
PCIDevice *pci_dev = (PCIDevice *)qdev;
PCIDeviceInfo *info = container_of(base, PCIDeviceInfo, qdev);
pci_dev = do_pci_register_device(pci_dev, bus, base->name, devfn,
info->config_read, info->config_write);
assert(pci_dev);
- info->init(pci_dev);
+ return info->init(pci_dev);
}
void pci_qdev_register(PCIDeviceInfo *info)
pci_set_word(&pci_config[PCI_CLASS_DEVICE], val);
}
-typedef void (*pci_qdev_initfn)(PCIDevice *dev);
+typedef int (*pci_qdev_initfn)(PCIDevice *dev);
typedef struct {
DeviceInfo qdev;
pci_qdev_initfn init;
KBDState kbd;
} ISAKBDState;
-static void i8042_initfn(ISADevice *dev)
+static int i8042_initfn(ISADevice *dev)
{
KBDState *s = &(DO_UPCAST(ISAKBDState, dev, dev)->kbd);
vmmouse_init(s->mouse);
#endif
qemu_register_reset(kbd_reset, s);
+ return 0;
}
static ISADeviceInfo i8042_info = {
qemu_free_timer(d->poll_timer);
}
-static void pcnet_common_init(DeviceState *dev, PCNetState *s,
+static int pcnet_common_init(DeviceState *dev, PCNetState *s,
NetCleanup *cleanup)
{
s->poll_timer = qemu_new_timer(vm_clock, pcnet_poll_timer, s);
cleanup, s);
pcnet_h_reset(s);
register_savevm("pcnet", -1, 2, pcnet_save, pcnet_load, s);
+ return 0;
}
/* PCI interface */
return 0;
}
-static void pci_pcnet_init(PCIDevice *pci_dev)
+static int pci_pcnet_init(PCIDevice *pci_dev)
{
PCIPCNetState *d = (PCIPCNetState *)pci_dev;
PCNetState *s = &d->state;
s->phys_mem_write = pci_physical_memory_write;
s->pci_dev = pci_dev;
- pcnet_common_init(&pci_dev->qdev, s, pci_pcnet_cleanup);
+ return pcnet_common_init(&pci_dev->qdev, s, pci_pcnet_cleanup);
}
/* SPARC32 interface */
pcnet_common_cleanup(d);
}
-static void lance_init(SysBusDevice *dev)
+static int lance_init(SysBusDevice *dev)
{
SysBusPCNetState *d = FROM_SYSBUS(SysBusPCNetState, dev);
PCNetState *s = &d->state;
s->phys_mem_read = ledma_memory_read;
s->phys_mem_write = ledma_memory_write;
- pcnet_common_init(&dev->qdev, s, lance_cleanup);
+ return pcnet_common_init(&dev->qdev, s, lance_cleanup);
}
static SysBusDeviceInfo lance_info = {
return 0;
}
-static void i440fx_pcihost_initfn(SysBusDevice *dev)
+static int i440fx_pcihost_initfn(SysBusDevice *dev)
{
I440FXState *s = FROM_SYSBUS(I440FXState, dev);
register_ioport_read(0xcfc, 4, 1, pci_host_data_readb, s);
register_ioport_read(0xcfc, 4, 2, pci_host_data_readw, s);
register_ioport_read(0xcfc, 4, 4, pci_host_data_readl, s);
+ return 0;
}
-static void i440fx_initfn(PCIDevice *d)
+static int i440fx_initfn(PCIDevice *d)
{
pci_config_set_vendor_id(d->config, PCI_VENDOR_ID_INTEL);
pci_config_set_device_id(d->config, PCI_DEVICE_ID_INTEL_82441);
d->config[0x72] = 0x02; /* SMRAM */
register_savevm("I440FX", 0, 2, i440fx_save, i440fx_load, d);
+ return 0;
}
PCIBus *i440fx_init(PCIDevice **pi440fx_state, qemu_irq *pic)
return pci_device_load(d, f);
}
-static void piix3_initfn(PCIDevice *d)
+static int piix3_initfn(PCIDevice *d)
{
uint8_t *pci_conf;
piix3_dev = d;
piix3_reset(d);
qemu_register_reset(piix3_reset, d);
+ return 0;
}
-static void piix4_initfn(PCIDevice *d)
+static int piix4_initfn(PCIDevice *d)
{
uint8_t *pci_conf;
piix4_dev = d;
piix4_reset(d);
qemu_register_reset(piix4_reset, d);
+ return 0;
}
int piix3_init(PCIBus *bus, int devfn)
return 0;
}
-static void pl011_init(SysBusDevice *dev, const unsigned char *id)
+static int pl011_init(SysBusDevice *dev, const unsigned char *id)
{
int iomemtype;
pl011_state *s = FROM_SYSBUS(pl011_state, dev);
pl011_event, s);
}
register_savevm("pl011_uart", -1, 1, pl011_save, pl011_load, s);
+ return 0;
}
-static void pl011_init_arm(SysBusDevice *dev)
+static int pl011_init_arm(SysBusDevice *dev)
{
- pl011_init(dev, pl011_id_arm);
+ return pl011_init(dev, pl011_id_arm);
}
-static void pl011_init_luminary(SysBusDevice *dev)
+static int pl011_init_luminary(SysBusDevice *dev)
{
- pl011_init(dev, pl011_id_luminary);
+ return pl011_init(dev, pl011_id_luminary);
}
static void pl011_register_devices(void)
return 0;
}
-static void pl022_init(SysBusDevice *dev)
+static int pl022_init(SysBusDevice *dev)
{
pl022_state *s = FROM_SYSBUS(pl022_state, dev);
int iomemtype;
s->ssi = ssi_create_bus(&dev->qdev, "ssi");
pl022_reset(s);
register_savevm("pl022_ssp", -1, 1, pl022_save, pl022_load, s);
+ return 0;
}
static void pl022_register_devices(void)
pl031_read
};
-static void pl031_init(SysBusDevice *dev)
+static int pl031_init(SysBusDevice *dev)
{
int iomemtype;
pl031_state *s = FROM_SYSBUS(pl031_state, dev);
s->tick_offset = mktimegm(&tm);
s->timer = qemu_new_timer(vm_clock, pl031_interrupt, s);
+ return 0;
}
static void pl031_register_devices(void)
pl050_write
};
-static void pl050_init(SysBusDevice *dev, int is_mouse)
+static int pl050_init(SysBusDevice *dev, int is_mouse)
{
pl050_state *s = FROM_SYSBUS(pl050_state, dev);
int iomemtype;
else
s->dev = ps2_kbd_init(pl050_update, s);
/* ??? Save/restore. */
+ return 0;
}
-static void pl050_init_keyboard(SysBusDevice *dev)
+static int pl050_init_keyboard(SysBusDevice *dev)
{
- pl050_init(dev, 0);
+ return pl050_init(dev, 0);
}
-static void pl050_init_mouse(SysBusDevice *dev)
+static int pl050_init_mouse(SysBusDevice *dev)
{
- pl050_init(dev, 1);
+ return pl050_init(dev, 1);
}
static void pl050_register_devices(void)
return 0;
}
-static void pl061_init(SysBusDevice *dev)
+static int pl061_init(SysBusDevice *dev)
{
int iomemtype;
pl061_state *s = FROM_SYSBUS(pl061_state, dev);
qdev_init_gpio_out(&dev->qdev, s->out, 8);
pl061_reset(s);
register_savevm("pl061_gpio", -1, 1, pl061_save, pl061_load, s);
+ return 0;
}
static void pl061_register_devices(void)
pl080_write
};
-static void pl08x_init(SysBusDevice *dev, int nchannels)
+static int pl08x_init(SysBusDevice *dev, int nchannels)
{
int iomemtype;
pl080_state *s = FROM_SYSBUS(pl080_state, dev);
sysbus_init_irq(dev, &s->irq);
s->nchannels = nchannels;
/* ??? Save/restore. */
+ return 0;
}
-static void pl080_init(SysBusDevice *dev)
+static int pl080_init(SysBusDevice *dev)
{
- pl08x_init(dev, 8);
+ return pl08x_init(dev, 8);
}
-static void pl081_init(SysBusDevice *dev)
+static int pl081_init(SysBusDevice *dev)
{
- pl08x_init(dev, 2);
+ return pl08x_init(dev, 2);
}
/* The PL080 and PL081 are the same except for the number of channels
pl110_write
};
-static void pl110_init(SysBusDevice *dev)
+static int pl110_init(SysBusDevice *dev)
{
pl110_state *s = FROM_SYSBUS(pl110_state, dev);
int iomemtype;
pl110_invalidate_display,
NULL, NULL, s);
/* ??? Save/restore. */
+ return 0;
}
-static void pl110_versatile_init(SysBusDevice *dev)
+static int pl110_versatile_init(SysBusDevice *dev)
{
pl110_state *s = FROM_SYSBUS(pl110_state, dev);
s->versatile = 1;
- pl110_init(dev);
+ return pl110_init(dev);
}
static void pl110_register_devices(void)
s->mask[1] = 0;
}
-static void pl181_init(SysBusDevice *dev)
+static int pl181_init(SysBusDevice *dev)
{
int iomemtype;
pl181_state *s = FROM_SYSBUS(pl181_state, dev);
qemu_register_reset(pl181_reset, s);
pl181_reset(s);
/* ??? Save/restore. */
+ return 0;
}
static void pl181_register_devices(void)
pl190_update_vectors(s);
}
-static void pl190_init(SysBusDevice *dev)
+static int pl190_init(SysBusDevice *dev)
{
pl190_state *s = FROM_SYSBUS(pl190_state, dev);
int iomemtype;
sysbus_init_irq(dev, &s->fiq);
pl190_reset(s);
/* ??? Save/restore. */
+ return 0;
}
static void pl190_register_devices(void)
return 0;
}
-static void pxa2xx_ssp_init(SysBusDevice *dev)
+static int pxa2xx_ssp_init(SysBusDevice *dev)
{
int iomemtype;
PXA2xxSSPState *s = FROM_SYSBUS(PXA2xxSSPState, dev);
pxa2xx_ssp_save, pxa2xx_ssp_load, s);
s->bus = ssi_create_bus(&dev->qdev, "ssi");
+ return 0;
}
/* Real-Time Clock */
return 0;
}
-static void pxa2xx_i2c_slave_init(i2c_slave *i2c)
+static int pxa2xx_i2c_slave_init(i2c_slave *i2c)
{
/* Nothing to do. */
+ return 0;
}
static I2CSlaveInfo pxa2xx_i2c_slave_info = {
qdev_free(qdev);
return NULL;
}
- qdev_init(qdev);
+ if (qdev_init(qdev) != 0) {
+ qdev_free(qdev);
+ return NULL;
+ }
return qdev;
}
/* Initialize a device. Device properties should be set before calling
this function. IRQs and MMIO regions should be connected/mapped after
calling this function. */
-void qdev_init(DeviceState *dev)
+int qdev_init(DeviceState *dev)
{
- dev->info->init(dev, dev->info);
+ return dev->info->init(dev, dev->info);
}
/* Unlink device from bus and free the structure. */
DeviceState *qdev_create(BusState *bus, const char *name);
DeviceState *qdev_device_add(QemuOpts *opts);
-void qdev_init(DeviceState *dev);
+int qdev_init(DeviceState *dev);
void qdev_free(DeviceState *dev);
qemu_irq qdev_get_gpio_in(DeviceState *dev, int n);
/*** Device API. ***/
-typedef void (*qdev_initfn)(DeviceState *dev, DeviceInfo *info);
+typedef int (*qdev_initfn)(DeviceState *dev, DeviceInfo *info);
typedef void (*SCSIAttachFn)(DeviceState *host, BlockDriverState *bdrv,
int unit);
cpu_register_physical_memory(base + 0x1000, 0x1000, s->gic.iomemtype);
}
-static void realview_gic_init(SysBusDevice *dev)
+static int realview_gic_init(SysBusDevice *dev)
{
RealViewGICState *s = FROM_SYSBUSGIC(RealViewGICState, dev);
s->iomemtype = cpu_register_io_memory(realview_gic_cpu_readfn,
realview_gic_cpu_writefn, s);
sysbus_init_mmio_cb(dev, 0x2000, realview_gic_map);
+ return 0;
}
static void realview_gic_register_devices(void)
return 0;
}
-static void pci_rtl8139_init(PCIDevice *dev)
+static int pci_rtl8139_init(PCIDevice *dev)
{
PCIRTL8139State *d = (PCIRTL8139State *)dev;
RTL8139State *s;
qemu_mod_timer(s->timer,
rtl8139_get_next_tctr_time(s,qemu_get_clock(vm_clock)));
#endif /* RTL8139_ONBOARD_TIMER */
+ return 0;
}
static PCIDeviceInfo rtl8139_info = {
}
}
-static void sbi_init1(SysBusDevice *dev)
+static int sbi_init1(SysBusDevice *dev)
{
SBIState *s = FROM_SYSBUS(SBIState, dev);
int sbi_io_memory;
register_savevm("sbi", -1, 1, sbi_save, sbi_load, s);
qemu_register_reset(sbi_reset, s);
sbi_reset(s);
+ return 0;
}
static SysBusDeviceInfo sbi_info = {
slavio_check_interrupts(s, 0);
}
-static void slavio_intctl_init1(SysBusDevice *dev)
+static int slavio_intctl_init1(SysBusDevice *dev)
{
SLAVIO_INTCTLState *s = FROM_SYSBUS(SLAVIO_INTCTLState, dev);
int io_memory;
slavio_intctl_load, s);
qemu_register_reset(slavio_intctl_reset, s);
slavio_intctl_reset(s);
+ return 0;
}
static SysBusDeviceInfo slavio_intctl_info = {
return 0;
}
-static void apc_init1(SysBusDevice *dev)
+static int apc_init1(SysBusDevice *dev)
{
APCState *s = FROM_SYSBUS(APCState, dev);
int io;
/* Power management (APC) XXX: not a Slavio device */
io = cpu_register_io_memory(apc_mem_read, apc_mem_write, s);
sysbus_init_mmio(dev, MISC_SIZE, io);
+ return 0;
}
-static void slavio_misc_init1(SysBusDevice *dev)
+static int slavio_misc_init1(SysBusDevice *dev)
{
MiscState *s = FROM_SYSBUS(MiscState, dev);
int io;
s);
qemu_register_reset(slavio_misc_reset, s);
slavio_misc_reset(s);
+ return 0;
}
static SysBusDeviceInfo slavio_misc_info = {
s->cputimer_mode = 0;
}
-static void slavio_timer_init1(SysBusDevice *dev)
+static int slavio_timer_init1(SysBusDevice *dev)
{
int io;
SLAVIO_TIMERState *s = FROM_SYSBUS(SLAVIO_TIMERState, dev);
slavio_timer_load, s);
qemu_register_reset(slavio_timer_reset, s);
slavio_timer_reset(s);
+ return 0;
}
static SysBusDeviceInfo slavio_timer_info = {
return 0;
}
-static void smbus_device_init(i2c_slave *i2c)
+static int smbus_device_init(i2c_slave *i2c)
{
SMBusDeviceInfo *t = container_of(i2c->info, SMBusDeviceInfo, i2c);
SMBusDevice *dev = FROM_I2C_SLAVE(SMBusDevice, i2c);
- t->init(dev);
+ return t->init(dev);
}
void smbus_register_device(SMBusDeviceInfo *info)
typedef struct {
I2CSlaveInfo i2c;
- void (*init)(SMBusDevice *dev);
+ int (*init)(SMBusDevice *dev);
void (*quick_cmd)(SMBusDevice *dev, uint8_t read);
void (*send_byte)(SMBusDevice *dev, uint8_t val);
uint8_t (*receive_byte)(SMBusDevice *dev);
return eeprom_receive_byte(dev);
}
-static void smbus_eeprom_init(SMBusDevice *dev)
+static int smbus_eeprom_init(SMBusDevice *dev)
{
SMBusEEPROMDevice *eeprom = (SMBusEEPROMDevice *)dev;
eeprom->offset = 0;
+ return 0;
}
static SMBusDeviceInfo smbus_eeprom_info = {
qemu_free(s);
}
-static void smc91c111_init1(SysBusDevice *dev)
+static int smc91c111_init1(SysBusDevice *dev)
{
smc91c111_state *s = FROM_SYSBUS(smc91c111_state, dev);
smc91c111_cleanup, s);
qemu_format_nic_info_str(s->vc, s->macaddr);
/* ??? Save/restore. */
+ return 0;
}
static void smc91c111_register_devices(void)
return 0;
}
-static void sparc32_dma_init1(SysBusDevice *dev)
+static int sparc32_dma_init1(SysBusDevice *dev)
{
DMAState *s = FROM_SYSBUS(DMAState, dev);
int dma_io_memory;
qdev_init_gpio_in(&dev->qdev, dma_set_irq, 1);
qdev_init_gpio_out(&dev->qdev, &s->dev_reset, 1);
+ return 0;
}
static SysBusDeviceInfo sparc32_dma_info = {
return 0;
}
-static void spitz_lcdtg_init(SSISlave *dev)
+static int spitz_lcdtg_init(SSISlave *dev)
{
SpitzLCDTG *s = FROM_SSI_SLAVE(SpitzLCDTG, dev);
register_savevm("spitz-lcdtg", -1, 1,
spitz_lcdtg_save, spitz_lcdtg_load, s);
+ return 0;
}
/* SSP devices */
return 0;
}
-static void corgi_ssp_init(SSISlave *dev)
+static int corgi_ssp_init(SSISlave *dev)
{
CorgiSSPState *s = FROM_SSI_SLAVE(CorgiSSPState, dev);
s->bus[2] = ssi_create_bus(&dev->qdev, "ssi2");
register_savevm("spitz_ssp", -1, 1, spitz_ssp_save, spitz_ssp_load, s);
+ return 0;
}
static void spitz_ssp_attach(PXA2xxState *cpu)
return 0;
}
-static void ssd0303_init(i2c_slave *i2c)
+static int ssd0303_init(i2c_slave *i2c)
{
ssd0303_state *s = FROM_I2C_SLAVE(ssd0303_state, i2c);
NULL, NULL, s);
qemu_console_resize(s->ds, 96 * MAGNIFY, 16 * MAGNIFY);
register_savevm("ssd0303_oled", -1, 1, ssd0303_save, ssd0303_load, s);
+ return 0;
}
static I2CSlaveInfo ssd0303_info = {
return 0;
}
-static void ssd0323_init(SSISlave *dev)
+static int ssd0323_init(SSISlave *dev)
{
ssd0323_state *s = FROM_SSI_SLAVE(ssd0323_state, dev);
qdev_init_gpio_in(&dev->qdev, ssd0323_cd, 1);
register_savevm("ssd0323_oled", -1, 1, ssd0323_save, ssd0323_load, s);
+ return 0;
}
static SSISlaveInfo ssd0323_info = {
return 0;
}
-static void ssi_sd_init(SSISlave *dev)
+static int ssi_sd_init(SSISlave *dev)
{
ssi_sd_state *s = FROM_SSI_SLAVE(ssi_sd_state, dev);
BlockDriverState *bs;
bs = qdev_init_bdrv(&dev->qdev, IF_SD);
s->sd = sd_init(bs, 1);
register_savevm("ssi_sd", -1, 1, ssi_sd_save, ssi_sd_load, s);
+ return 0;
}
static SSISlaveInfo ssi_sd_info = {
.size = sizeof(SSIBus),
};
-static void ssi_slave_init(DeviceState *dev, DeviceInfo *base_info)
+static int ssi_slave_init(DeviceState *dev, DeviceInfo *base_info)
{
SSISlaveInfo *info = container_of(base_info, SSISlaveInfo, qdev);
SSISlave *s = SSI_SLAVE_FROM_QDEV(dev);
}
s->info = info;
- info->init(s);
+ return info->init(s);
}
void ssi_register_slave(SSISlaveInfo *info)
/* Slave devices. */
typedef struct {
DeviceInfo qdev;
- void (*init)(SSISlave *dev);
+ int (*init)(SSISlave *dev);
uint32_t (*transfer)(SSISlave *dev, uint32_t val);
} SSISlaveInfo;
return 0;
}
-static void stellaris_gptm_init(SysBusDevice *dev)
+static int stellaris_gptm_init(SysBusDevice *dev)
{
int iomemtype;
gptm_state *s = FROM_SYSBUS(gptm_state, dev);
s->timer[0] = qemu_new_timer(vm_clock, gptm_tick, &s->opaque[0]);
s->timer[1] = qemu_new_timer(vm_clock, gptm_tick, &s->opaque[1]);
register_savevm("stellaris_gptm", -1, 1, gptm_save, gptm_load, s);
+ return 0;
}
return 0;
}
-static void stellaris_sys_init(uint32_t base, qemu_irq irq,
- stellaris_board_info * board,
- uint8_t *macaddr)
+static int stellaris_sys_init(uint32_t base, qemu_irq irq,
+ stellaris_board_info * board,
+ uint8_t *macaddr)
{
int iomemtype;
ssys_state *s;
cpu_register_physical_memory(base, 0x00001000, iomemtype);
ssys_reset(s);
register_savevm("stellaris_sys", -1, 1, ssys_save, ssys_load, s);
+ return 0;
}
return 0;
}
-static void stellaris_i2c_init(SysBusDevice * dev)
+static int stellaris_i2c_init(SysBusDevice * dev)
{
stellaris_i2c_state *s = FROM_SYSBUS(stellaris_i2c_state, dev);
i2c_bus *bus;
stellaris_i2c_reset(s);
register_savevm("stellaris_i2c", -1, 1,
stellaris_i2c_save, stellaris_i2c_load, s);
+ return 0;
}
/* Analogue to Digital Converter. This is only partially implemented,
return 0;
}
-static void stellaris_adc_init(SysBusDevice *dev)
+static int stellaris_adc_init(SysBusDevice *dev)
{
stellaris_adc_state *s = FROM_SYSBUS(stellaris_adc_state, dev);
int iomemtype;
qdev_init_gpio_in(&dev->qdev, stellaris_adc_trigger, 1);
register_savevm("stellaris_adc", -1, 1,
stellaris_adc_save, stellaris_adc_load, s);
+ return 0;
}
/* Some boards have both an OLED controller and SD card connected to
return 0;
}
-static void stellaris_ssi_bus_init(SSISlave *dev)
+static int stellaris_ssi_bus_init(SSISlave *dev)
{
stellaris_ssi_bus_state *s = FROM_SSI_SLAVE(stellaris_ssi_bus_state, dev);
register_savevm("stellaris_ssi_bus", -1, 1,
stellaris_ssi_bus_save, stellaris_ssi_bus_load, s);
+ return 0;
}
/* Board init. */
qemu_free(s);
}
-static void stellaris_enet_init(SysBusDevice *dev)
+static int stellaris_enet_init(SysBusDevice *dev)
{
stellaris_enet_state *s = FROM_SYSBUS(stellaris_enet_state, dev);
stellaris_enet_reset(s);
register_savevm("stellaris_enet", -1, 1,
stellaris_enet_save, stellaris_enet_load, s);
+ return 0;
}
static void stellaris_enet_register_devices(void)
s->pending = 0;
}
-static void sun4c_intctl_init1(SysBusDevice *dev)
+static int sun4c_intctl_init1(SysBusDevice *dev)
{
Sun4c_INTCTLState *s = FROM_SYSBUS(Sun4c_INTCTLState, dev);
int io_memory;
sun4c_intctl_load, s);
qemu_register_reset(sun4c_intctl_reset, s);
sun4c_intctl_reset(s);
+ return 0;
}
static SysBusDeviceInfo sun4c_intctl_info = {
cpu_physical_memory_write_rom(addr, idreg_data, sizeof(idreg_data));
}
-static void idreg_init1(SysBusDevice *dev)
+static int idreg_init1(SysBusDevice *dev)
{
ram_addr_t idreg_offset;
idreg_offset = qemu_ram_alloc(sizeof(idreg_data));
sysbus_init_mmio(dev, sizeof(idreg_data), idreg_offset | IO_MEM_ROM);
+ return 0;
}
static SysBusDeviceInfo idreg_info = {
}
}
-static void prom_init1(SysBusDevice *dev)
+static int prom_init1(SysBusDevice *dev)
{
ram_addr_t prom_offset;
prom_offset = qemu_ram_alloc(PROM_SIZE_MAX);
sysbus_init_mmio(dev, PROM_SIZE_MAX, prom_offset | IO_MEM_ROM);
+ return 0;
}
static SysBusDeviceInfo prom_info = {
} RamDevice;
/* System RAM */
-static void ram_init1(SysBusDevice *dev)
+static int ram_init1(SysBusDevice *dev)
{
ram_addr_t RAM_size, ram_offset;
RamDevice *d = FROM_SYSBUS(RamDevice, dev);
ram_offset = qemu_ram_alloc(RAM_size);
sysbus_init_mmio(dev, RAM_size, ram_offset);
+ return 0;
}
static void ram_init(target_phys_addr_t addr, ram_addr_t RAM_size,
pci_create_simple(bus, devfn, "ebus");
}
-static void
+static int
pci_ebus_init1(PCIDevice *s)
{
isa_bus_new(&s->qdev);
ebus_mmio_mapfunc);
pci_register_bar(s, 1, 0x800000, PCI_ADDRESS_SPACE_MEM,
ebus_mmio_mapfunc);
+ return 0;
}
static PCIDeviceInfo ebus_info = {
}
}
-static void prom_init1(SysBusDevice *dev)
+static int prom_init1(SysBusDevice *dev)
{
ram_addr_t prom_offset;
prom_offset = qemu_ram_alloc(PROM_SIZE_MAX);
sysbus_init_mmio(dev, PROM_SIZE_MAX, prom_offset | IO_MEM_ROM);
+ return 0;
}
static SysBusDeviceInfo prom_info = {
} RamDevice;
/* System RAM */
-static void ram_init1(SysBusDevice *dev)
+static int ram_init1(SysBusDevice *dev)
{
ram_addr_t RAM_size, ram_offset;
RamDevice *d = FROM_SYSBUS(RamDevice, dev);
ram_offset = qemu_ram_alloc(RAM_size);
sysbus_init_mmio(dev, RAM_size, ram_offset);
+ return 0;
}
static void ram_init(target_phys_addr_t addr, ram_addr_t RAM_size)
return 0;
}
-static void syborg_fb_init(SysBusDevice *dev)
+static int syborg_fb_init(SysBusDevice *dev)
{
SyborgFBState *s = FROM_SYSBUS(SyborgFBState, dev);
int iomemtype;
register_savevm("syborg_framebuffer", -1, 1,
syborg_fb_save, syborg_fb_load, s);
+ return 0;
}
static SysBusDeviceInfo syborg_fb_info = {
return 0;
}
-static void syborg_int_init(SysBusDevice *dev)
+static int syborg_int_init(SysBusDevice *dev)
{
SyborgIntState *s = FROM_SYSBUS(SyborgIntState, dev);
int iomemtype;
s->flags = qemu_mallocz(s->num_irqs * sizeof(syborg_int_flags));
register_savevm("syborg_int", -1, 1, syborg_int_save, syborg_int_load, s);
+ return 0;
}
static SysBusDeviceInfo syborg_int_info = {
return 0;
}
-static void syborg_keyboard_init(SysBusDevice *dev)
+static int syborg_keyboard_init(SysBusDevice *dev)
{
SyborgKeyboardState *s = FROM_SYSBUS(SyborgKeyboardState, dev);
int iomemtype;
register_savevm("syborg_keyboard", -1, 1,
syborg_keyboard_save, syborg_keyboard_load, s);
+ return 0;
}
static SysBusDeviceInfo syborg_keyboard_info = {
return 0;
}
-static void syborg_pointer_init(SysBusDevice *dev)
+static int syborg_pointer_init(SysBusDevice *dev)
{
SyborgPointerState *s = FROM_SYSBUS(SyborgPointerState, dev);
int iomemtype;
register_savevm("syborg_pointer", -1, 1,
syborg_pointer_save, syborg_pointer_load, s);
+ return 0;
}
static SysBusDeviceInfo syborg_pointer_info = {
return 0;
}
-static void syborg_rtc_init(SysBusDevice *dev)
+static int syborg_rtc_init(SysBusDevice *dev)
{
SyborgRTCState *s = FROM_SYSBUS(SyborgRTCState, dev);
struct tm tm;
s->offset = (uint64_t)mktime(&tm) * 1000000000;
register_savevm("syborg_rtc", -1, 1, syborg_rtc_save, syborg_rtc_load, s);
+ return 0;
}
static void syborg_rtc_register_devices(void)
return 0;
}
-static void syborg_serial_init(SysBusDevice *dev)
+static int syborg_serial_init(SysBusDevice *dev)
{
SyborgSerialState *s = FROM_SYSBUS(SyborgSerialState, dev);
int iomemtype;
register_savevm("syborg_serial", -1, 1,
syborg_serial_save, syborg_serial_load, s);
+ return 0;
}
static SysBusDeviceInfo syborg_serial_info = {
return 0;
}
-static void syborg_timer_init(SysBusDevice *dev)
+static int syborg_timer_init(SysBusDevice *dev)
{
SyborgTimerState *s = FROM_SYSBUS(SyborgTimerState, dev);
QEMUBH *bh;
ptimer_set_freq(s->timer, s->freq);
register_savevm("syborg_timer", -1, 1,
syborg_timer_save, syborg_timer_load, s);
+ return 0;
}
static SysBusDeviceInfo syborg_timer_info = {
.notify = syborg_virtio_update_irq
};
-static void syborg_virtio_init(SyborgVirtIOProxy *proxy, VirtIODevice *vdev)
+static int syborg_virtio_init(SyborgVirtIOProxy *proxy, VirtIODevice *vdev)
{
int iomemtype;
qemu_register_reset(virtio_reset, vdev);
virtio_bind_device(vdev, &syborg_virtio_bindings, proxy);
+ return 0;
}
/* Device specific bindings. */
-static void syborg_virtio_net_init(SysBusDevice *dev)
+static int syborg_virtio_net_init(SysBusDevice *dev)
{
VirtIODevice *vdev;
SyborgVirtIOProxy *proxy = FROM_SYSBUS(SyborgVirtIOProxy, dev);
vdev = virtio_net_init(&dev->qdev);
- syborg_virtio_init(proxy, vdev);
+ return syborg_virtio_init(proxy, vdev);
}
static void syborg_virtio_register_devices(void)
dev->mmio[n].cb = cb;
}
-static void sysbus_device_init(DeviceState *dev, DeviceInfo *base)
+static int sysbus_device_init(DeviceState *dev, DeviceInfo *base)
{
SysBusDeviceInfo *info = container_of(base, SysBusDeviceInfo, qdev);
- info->init(sysbus_from_qdev(dev));
+ return info->init(sysbus_from_qdev(dev));
}
void sysbus_register_withprop(SysBusDeviceInfo *info)
} mmio[QDEV_MAX_MMIO];
};
-typedef void (*sysbus_initfn)(SysBusDevice *dev);
+typedef int (*sysbus_initfn)(SysBusDevice *dev);
/* Macros to compensate for lack of type inheritance in C. */
#define sysbus_from_qdev(dev) ((SysBusDevice *)(dev))
tcx_dummy_writel,
};
-static void tcx_init1(SysBusDevice *dev)
+static int tcx_init1(SysBusDevice *dev)
{
TCXState *s = FROM_SYSBUS(TCXState, dev);
int io_memory, dummy_memory;
qemu_register_reset(tcx_reset, s);
tcx_reset(s);
qemu_console_resize(s->ds, s->width, s->height);
+ return 0;
}
static void tcx_screen_dump(void *opaque, const char *filename)
tmp105_interrupt_update(s);
}
-static void tmp105_init(i2c_slave *i2c)
+static int tmp105_init(i2c_slave *i2c)
{
TMP105State *s = FROM_I2C_SLAVE(TMP105State, i2c);
tmp105_reset(&s->i2c);
register_savevm("TMP105", -1, 0, tmp105_save, tmp105_load, s);
+ return 0;
}
static I2CSlaveInfo tmp105_info = {
return 0;
}
-static void tosa_ssp_init(SSISlave *dev)
+static int tosa_ssp_init(SSISlave *dev)
{
/* Nothing to do. */
+ return 0;
}
typedef struct {
return -1;
}
-static void tosa_dac_init(i2c_slave *i2c)
+static int tosa_dac_init(i2c_slave *i2c)
{
/* Nothing to do. */
+ return 0;
}
static void tosa_tg_init(PXA2xxState *cpu)
return 0;
}
-static void twl92230_init(i2c_slave *i2c)
+static int twl92230_init(i2c_slave *i2c)
{
MenelausState *s = FROM_I2C_SLAVE(MenelausState, i2c);
menelaus_reset(&s->i2c);
register_savevm("menelaus", -1, 0, menelaus_save, menelaus_load, s);
+ return 0;
}
static I2CSlaveInfo twl92230_info = {
{
}
-static void pci_unin_main_init_device(SysBusDevice *dev)
+static int pci_unin_main_init_device(SysBusDevice *dev)
{
UNINState *s;
int pci_mem_config, pci_mem_data;
register_savevm("uninorth", 0, 1, pci_unin_save, pci_unin_load, &s->host_state);
qemu_register_reset(pci_unin_reset, &s->host_state);
pci_unin_reset(&s->host_state);
+ return 0;
}
-static void pci_dec_21154_init_device(SysBusDevice *dev)
+static int pci_dec_21154_init_device(SysBusDevice *dev)
{
UNINState *s;
int pci_mem_config, pci_mem_data;
pci_unin_main_write, &s->host_state);
sysbus_init_mmio(dev, 0x1000, pci_mem_config);
sysbus_init_mmio(dev, 0x1000, pci_mem_data);
+ return 0;
}
-static void pci_unin_agp_init_device(SysBusDevice *dev)
+static int pci_unin_agp_init_device(SysBusDevice *dev)
{
UNINState *s;
int pci_mem_config, pci_mem_data;
pci_unin_main_write, &s->host_state);
sysbus_init_mmio(dev, 0x1000, pci_mem_config);
sysbus_init_mmio(dev, 0x1000, pci_mem_data);
+ return 0;
}
-static void pci_unin_internal_init_device(SysBusDevice *dev)
+static int pci_unin_internal_init_device(SysBusDevice *dev)
{
UNINState *s;
int pci_mem_config, pci_mem_data;
pci_unin_write, s);
sysbus_init_mmio(dev, 0x1000, pci_mem_config);
sysbus_init_mmio(dev, 0x1000, pci_mem_data);
+ return 0;
}
PCIBus *pci_pmac_init(qemu_irq *pic)
return d->host_state.bus;
}
-static void unin_main_pci_host_init(PCIDevice *d)
+static int unin_main_pci_host_init(PCIDevice *d)
{
pci_config_set_vendor_id(d->config, PCI_VENDOR_ID_APPLE);
pci_config_set_device_id(d->config, PCI_DEVICE_ID_APPLE_UNI_N_PCI);
d->config[0x0D] = 0x10; // latency_timer
d->config[PCI_HEADER_TYPE] = PCI_HEADER_TYPE_NORMAL; // header_type
d->config[0x34] = 0x00; // capabilities_pointer
+ return 0;
}
-static void dec_21154_pci_host_init(PCIDevice *d)
+static int dec_21154_pci_host_init(PCIDevice *d)
{
/* pci-to-pci bridge */
pci_config_set_vendor_id(d->config, PCI_VENDOR_ID_DEC);
d->config[0x26] = 0xF1; // prefectchable_memory_limit
d->config[0x27] = 0x7F;
// d->config[0x34] = 0xdc // capabilities_pointer
+ return 0;
}
-static void unin_agp_pci_host_init(PCIDevice *d)
+static int unin_agp_pci_host_init(PCIDevice *d)
{
pci_config_set_vendor_id(d->config, PCI_VENDOR_ID_APPLE);
pci_config_set_device_id(d->config, PCI_DEVICE_ID_APPLE_UNI_N_AGP);
d->config[0x0D] = 0x10; // latency_timer
d->config[PCI_HEADER_TYPE] = PCI_HEADER_TYPE_NORMAL; // header_type
// d->config[0x34] = 0x80; // capabilities_pointer
+ return 0;
}
-static void unin_internal_pci_host_init(PCIDevice *d)
+static int unin_internal_pci_host_init(PCIDevice *d)
{
pci_config_set_vendor_id(d->config, PCI_VENDOR_ID_APPLE);
pci_config_set_device_id(d->config, PCI_DEVICE_ID_APPLE_UNI_N_I_PCI);
d->config[0x0D] = 0x10; // latency_timer
d->config[PCI_HEADER_TYPE] = PCI_HEADER_TYPE_NORMAL; // header_type
d->config[0x34] = 0x00; // capabilities_pointer
+ return 0;
}
static PCIDeviceInfo unin_main_pci_host_info = {
}
}
-static void pci_vpb_init(SysBusDevice *dev)
+static int pci_vpb_init(SysBusDevice *dev)
{
PCIVPBState *s = FROM_SYSBUS(PCIVPBState, dev);
PCIBus *bus;
sysbus_init_mmio_cb(dev, 0x04000000, pci_vpb_map);
pci_create_simple(bus, -1, "versatile_pci_host");
+ return 0;
}
-static void pci_realview_init(SysBusDevice *dev)
+static int pci_realview_init(SysBusDevice *dev)
{
PCIVPBState *s = FROM_SYSBUS(PCIVPBState, dev);
s->realview = 1;
- pci_vpb_init(dev);
+ return pci_vpb_init(dev);
}
-static void versatile_pci_host_init(PCIDevice *d)
+static int versatile_pci_host_init(PCIDevice *d)
{
pci_config_set_vendor_id(d->config, PCI_VENDOR_ID_XILINX);
/* Both boards have the same device ID. Oh well. */
d->config[0x09] = 0x00; // programming i/f
pci_config_set_class(d->config, PCI_CLASS_PROCESSOR_CO);
d->config[0x0D] = 0x10; // latency_timer
+ return 0;
}
static PCIDeviceInfo versatile_pci_host_info = {
vpb_sic_write
};
-static void vpb_sic_init(SysBusDevice *dev)
+static int vpb_sic_init(SysBusDevice *dev)
{
vpb_sic_state *s = FROM_SYSBUS(vpb_sic_state, dev);
int iomemtype;
vpb_sic_writefn, s);
sysbus_init_mmio(dev, 0x1000, iomemtype);
/* ??? Save/restore. */
+ return 0;
}
/* Board init. */
s->map_addr = 0;
}
-static void pci_vga_initfn(PCIDevice *dev)
+static int pci_vga_initfn(PCIDevice *dev)
{
PCIVGAState *d = DO_UPCAST(PCIVGAState, dev, dev);
VGAState *s = &d->vga_state;
bios_total_size <<= 1;
pci_register_bar(&d->dev, PCI_ROM_SLOT, bios_total_size,
PCI_ADDRESS_SPACE_MEM_PREFETCH, vga_map);
- }
+ }
+ return 0;
}
int pci_vga_init(PCIBus *bus,
virtio_bind_device(vdev, &virtio_pci_bindings, proxy);
}
-static void virtio_blk_init_pci(PCIDevice *pci_dev)
+static int virtio_blk_init_pci(PCIDevice *pci_dev)
{
VirtIOPCIProxy *proxy = DO_UPCAST(VirtIOPCIProxy, pci_dev, pci_dev);
VirtIODevice *vdev;
if (!proxy->dinfo) {
fprintf(stderr, "drive property not set\n");
+ return -1;
}
vdev = virtio_blk_init(&pci_dev->qdev, proxy->dinfo);
vdev->nvectors = proxy->nvectors;
proxy->class_code, 0x00);
/* make the actual value visible */
proxy->nvectors = vdev->nvectors;
+ return 0;
}
-static void virtio_console_init_pci(PCIDevice *pci_dev)
+static int virtio_console_init_pci(PCIDevice *pci_dev)
{
VirtIOPCIProxy *proxy = DO_UPCAST(VirtIOPCIProxy, pci_dev, pci_dev);
VirtIODevice *vdev;
PCI_VENDOR_ID_REDHAT_QUMRANET,
PCI_DEVICE_ID_VIRTIO_CONSOLE,
proxy->class_code, 0x00);
+ return 0;
}
-static void virtio_net_init_pci(PCIDevice *pci_dev)
+static int virtio_net_init_pci(PCIDevice *pci_dev)
{
VirtIOPCIProxy *proxy = DO_UPCAST(VirtIOPCIProxy, pci_dev, pci_dev);
VirtIODevice *vdev;
/* make the actual value visible */
proxy->nvectors = vdev->nvectors;
+ return 0;
}
-static void virtio_balloon_init_pci(PCIDevice *pci_dev)
+static int virtio_balloon_init_pci(PCIDevice *pci_dev)
{
VirtIOPCIProxy *proxy = DO_UPCAST(VirtIOPCIProxy, pci_dev, pci_dev);
VirtIODevice *vdev;
PCI_DEVICE_ID_VIRTIO_BALLOON,
PCI_CLASS_MEMORY_RAM,
0x00);
+ return 0;
}
static PCIDeviceInfo virtio_info[] = {
iomemtype);
}
-static void pci_vmsvga_initfn(PCIDevice *dev)
+static int pci_vmsvga_initfn(PCIDevice *dev)
{
struct pci_vmsvga_state_s *s =
DO_UPCAST(struct pci_vmsvga_state_s, card, dev);
vmsvga_init(&s->chip, VGA_RAM_SIZE);
register_savevm("vmware_vga", 0, 0, pci_vmsvga_save, pci_vmsvga_load, s);
+ return 0;
}
void pci_vmsvga_init(PCIBus *bus)
return 0;
}
-static void i6300esb_init(PCIDevice *dev)
+static int i6300esb_init(PCIDevice *dev)
{
I6300State *d = container_of(dev, I6300State, dev);
uint8_t *pci_conf;
register_savevm("i6300esb_wdt", -1, sizeof(I6300State),
i6300esb_save, i6300esb_load, d);
+
+ return 0;
}
static WatchdogTimerModel model = {
return 0;
}
-static void wdt_ib700_init(ISADevice *dev)
+static int wdt_ib700_init(ISADevice *dev)
{
timer = qemu_new_timer(vm_clock, ib700_timer_expired, NULL);
register_savevm("ib700_wdt", -1, 0, ib700_save, ib700_load, NULL);
register_ioport_write(0x441, 2, 1, ib700_write_disable_reg, NULL);
register_ioport_write(0x443, 2, 1, ib700_write_enable_reg, NULL);
+
+ return 0;
}
static WatchdogTimerModel model = {
return 0;
}
-static void wm8750_init(i2c_slave *i2c)
+static int wm8750_init(i2c_slave *i2c)
{
WM8750State *s = FROM_I2C_SLAVE(WM8750State, i2c);
wm8750_reset(&s->i2c);
register_savevm(CODEC, -1, 0, wm8750_save, wm8750_load, s);
+ return 0;
}
#if 0
qemu_free(s);
}
-static void xilinx_ethlite_init(SysBusDevice *dev)
+static int xilinx_ethlite_init(SysBusDevice *dev)
{
struct xlx_ethlite *s = FROM_SYSBUS(typeof (*s), dev);
int regs;
qdev_get_macaddr(&dev->qdev, s->macaddr);
s->vc = qdev_get_vlan_client(&dev->qdev,
eth_can_rx, eth_rx, NULL, eth_cleanup, s);
+ return 0;
}
static SysBusDeviceInfo xilinx_ethlite_info = {
update_irq(p);
}
-static void xilinx_intc_init(SysBusDevice *dev)
+static int xilinx_intc_init(SysBusDevice *dev)
{
struct xlx_pic *p = FROM_SYSBUS(typeof (*p), dev);
int pic_regs;
pic_regs = cpu_register_io_memory(pic_read, pic_write, p);
sysbus_init_mmio(dev, R_MAX * 4, pic_regs);
+ return 0;
}
static SysBusDeviceInfo xilinx_intc_info = {
timer_update_irq(t);
}
-static void xilinx_timer_init(SysBusDevice *dev)
+static int xilinx_timer_init(SysBusDevice *dev)
{
struct timerblock *t = FROM_SYSBUS(typeof (*t), dev);
unsigned int i;
timer_regs = cpu_register_io_memory(timer_read, timer_write, t);
sysbus_init_mmio(dev, R_MAX * 4 * t->nr_timers, timer_regs);
+ return 0;
}
static SysBusDeviceInfo xilinx_timer_info = {
}
-static void xilinx_uartlite_init(SysBusDevice *dev)
+static int xilinx_uartlite_init(SysBusDevice *dev)
{
struct xlx_uartlite *s = FROM_SYSBUS(typeof (*s), dev);
int uart_regs;
s->chr = qdev_init_chardev(&dev->qdev);
if (s->chr)
qemu_chr_add_handlers(s->chr, uart_can_rx, uart_rx, uart_event, s);
+ return 0;
}
static void xilinx_uart_register(void)
projects / sdk / emulator / qemu.git / commitdiff