ARM: tegra: apalis-tk1: Hog group for ethernet, PCIe, reset GPIOs

The Apalis TK1 module uses some dedicated GPIOs as I210 gigabit Ethernet
controller reset and to control RESET_MOCI aka reset module output
carrier input on MXM3 pin 26. The Apalis Evaluation Board furthermore
uses Apalis GPIO7 on MXM3 pin 15 as reset signal for its PLX PEX 8605
PCIe Switch.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>

diff --git a/arch/arm/boot/dts/tegra124-apalis-eval.dts b/arch/arm/boot/dts/tegra124-apalis-eval.dts
index af6c566..f1010ce 100644 (file)
--- a/arch/arm/boot/dts/tegra124-apalis-eval.dts
+++ b/arch/arm/boot/dts/tegra124-apalis-eval.dts
@@ -275,3 +275,13 @@
                vin-supply = <&reg_5v0>;
        };
 };
+
+&gpio {
+       /* Apalis GPIO7 MXM3 pin 15 PLX PEX 8605 PCIe Switch Reset */
+       pex_perst_n {
+               gpio-hog;
+               gpios = <TEGRA_GPIO(DD, 1) GPIO_ACTIVE_HIGH>;
+               output-high;
+               line-name = "PEX_PERST_N";
+       };
+};

diff --git a/arch/arm/boot/dts/tegra124-apalis.dtsi b/arch/arm/boot/dts/tegra124-apalis.dtsi
index 44c3117..b7648ce 100644 (file)
--- a/arch/arm/boot/dts/tegra124-apalis.dtsi
+++ b/arch/arm/boot/dts/tegra124-apalis.dtsi
@@ -2070,3 +2070,21 @@
                };
        };
 };
+
+&gpio {
+       /* I210 Gigabit Ethernet Controller Reset */
+       lan_reset_n {
+               gpio-hog;
+               gpios = <TEGRA_GPIO(S, 2) GPIO_ACTIVE_HIGH>;
+               output-high;
+               line-name = "LAN_RESET_N";
+       };
+
+       /* Control MXM3 pin 26 Reset Module Output Carrier Input */
+       reset_moci_ctrl {
+               gpio-hog;
+               gpios = <TEGRA_GPIO(U, 4) GPIO_ACTIVE_HIGH>;
+               output-high;
+               line-name = "RESET_MOCI_CTRL";
+       };
+};