watchdog: add amlogic watchdog support
authorPhilippe Boos <pboos@baylibre.com>
Mon, 13 Jun 2022 14:00:56 +0000 (16:00 +0200)
committerStefan Roese <sr@denx.de>
Thu, 21 Jul 2022 06:09:06 +0000 (08:09 +0200)
Add support for hardware watchdog timer for Amlogic SoCs.
This driver has been heavily inspired by his Linux equivalent
(meson_gxbb_wdt.c).

Reviewed-by: Jerome Brunet <jbrunet@baylibre.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Philippe Boos <pboos@baylibre.com>
Reviewed-by: Stefan Roese <sr@denx.de>
MAINTAINERS
doc/board/amlogic/index.rst
drivers/watchdog/Kconfig
drivers/watchdog/Makefile
drivers/watchdog/meson_gxbb_wdt.c [new file with mode: 0644]

index b85629d..7701a9d 100644 (file)
@@ -161,6 +161,7 @@ F:  drivers/spi/meson_spifc.c
 F:     drivers/pinctrl/meson/
 F:     drivers/power/domain/meson-gx-pwrc-vpu.c
 F:     drivers/video/meson/
+F:     drivers/watchdog/meson_gxbb_wdt.c
 F:     include/configs/meson64.h
 F:     include/configs/meson64_android.h
 F:     doc/board/amlogic/
index 9c7fadf..cc2ba50 100644 (file)
@@ -73,6 +73,8 @@ This matrix concerns the actual source code version.
 +-------------------------------+-----------+-----------------+--------------+-------------+------------+-------------+--------------+
 | PCIe (+NVMe)                  | *N/A*     | *N/A*           | *N/A*        | **Yes**     | **Yes**    | **Yes**     | **Yes**      |
 +-------------------------------+-----------+-----------------+--------------+-------------+------------+-------------+--------------+
+| Watchdog                      | *N/A*     | **Yes**         | *N/A*        | *N/A*       | *N/A*      | *N/A*       | *N/A*        |
++-------------------------------+-----------+-----------------+--------------+-------------+------------+-------------+--------------+
 
 Boot Documentation
 ------------------
index c51d3b1..50e6a1e 100644 (file)
@@ -175,6 +175,13 @@ config WDT_MAX6370
        help
          Select this to enable max6370 watchdog timer.
 
+config WDT_MESON_GXBB
+       bool "Amlogic watchdog timer support"
+       depends on WDT
+       help
+         Select this to enable Meson watchdog timer,
+         which can be found on some Amlogic platforms.
+
 config WDT_MPC8xx
        bool "MPC8xx watchdog timer support"
        depends on WDT && MPC8xx
index 1f6199b..0e2f582 100644 (file)
@@ -27,6 +27,7 @@ obj-$(CONFIG_WDT_ORION) += orion_wdt.o
 obj-$(CONFIG_WDT_CDNS) += cdns_wdt.o
 obj-$(CONFIG_WDT_GPIO) += gpio_wdt.o
 obj-$(CONFIG_WDT_MAX6370) += max6370_wdt.o
+obj-$(CONFIG_WDT_MESON_GXBB) += meson_gxbb_wdt.o
 obj-$(CONFIG_WDT_MPC8xx) += mpc8xx_wdt.o
 obj-$(CONFIG_WDT_MT7620) += mt7620_wdt.o
 obj-$(CONFIG_WDT_MT7621) += mt7621_wdt.o
diff --git a/drivers/watchdog/meson_gxbb_wdt.c b/drivers/watchdog/meson_gxbb_wdt.c
new file mode 100644 (file)
index 0000000..6ab0058
--- /dev/null
@@ -0,0 +1,136 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (c) 2022 BayLibre, SAS.
+ */
+
+#include <clk.h>
+#include <dm.h>
+#include <dm/device_compat.h>
+#include <reset.h>
+#include <wdt.h>
+#include <asm/io.h>
+#include <linux/bitops.h>
+
+#define GXBB_WDT_CTRL_REG                      0x0
+#define GXBB_WDT_TCNT_REG                      0x8
+#define GXBB_WDT_RSET_REG                      0xc
+
+#define GXBB_WDT_CTRL_SYS_RESET_NOW            BIT(26)
+#define GXBB_WDT_CTRL_CLKDIV_EN                        BIT(25)
+#define GXBB_WDT_CTRL_CLK_EN                   BIT(24)
+#define GXBB_WDT_CTRL_EE_RESET                 BIT(21)
+#define GXBB_WDT_CTRL_EN                       BIT(18)
+
+#define GXBB_WDT_CTRL_DIV_MASK                 GENMASK(17, 0)
+#define GXBB_WDT_TCNT_SETUP_MASK               GENMASK(15, 0)
+
+
+struct amlogic_wdt_priv {
+       void __iomem *reg_base;
+};
+
+static int amlogic_wdt_set_timeout(struct udevice *dev, u64 timeout_ms)
+{
+       struct amlogic_wdt_priv *data = dev_get_priv(dev);
+
+       if (timeout_ms > GXBB_WDT_TCNT_SETUP_MASK) {
+               dev_warn(dev, "%s: timeout_ms=%llu: maximum watchdog timeout exceeded\n",
+                        __func__, timeout_ms);
+               timeout_ms = GXBB_WDT_TCNT_SETUP_MASK;
+       }
+
+       writel(timeout_ms, data->reg_base + GXBB_WDT_TCNT_REG);
+
+       return 0;
+}
+
+static int amlogic_wdt_stop(struct udevice *dev)
+{
+       struct amlogic_wdt_priv *data = dev_get_priv(dev);
+
+       writel(readl(data->reg_base + GXBB_WDT_CTRL_REG) & ~GXBB_WDT_CTRL_EN,
+              data->reg_base + GXBB_WDT_CTRL_REG);
+
+       return 0;
+}
+
+static int amlogic_wdt_start(struct udevice *dev, u64 time_ms, ulong flags)
+{
+       struct amlogic_wdt_priv *data = dev_get_priv(dev);
+
+       writel(readl(data->reg_base + GXBB_WDT_CTRL_REG) | GXBB_WDT_CTRL_EN,
+              data->reg_base + GXBB_WDT_CTRL_REG);
+
+       return amlogic_wdt_set_timeout(dev, time_ms);
+}
+
+static int amlogic_wdt_reset(struct udevice *dev)
+{
+       struct amlogic_wdt_priv *data = dev_get_priv(dev);
+
+       writel(0, data->reg_base + GXBB_WDT_RSET_REG);
+
+       return 0;
+}
+
+static int amlogic_wdt_expire_now(struct udevice *dev, ulong flags)
+{
+       struct amlogic_wdt_priv *data = dev_get_priv(dev);
+
+       writel(0, data->reg_base + GXBB_WDT_CTRL_SYS_RESET_NOW);
+
+       return 0;
+}
+
+static int amlogic_wdt_probe(struct udevice *dev)
+{
+       struct amlogic_wdt_priv *data = dev_get_priv(dev);
+       int ret;
+
+       data->reg_base = dev_remap_addr(dev);
+       if (!data->reg_base)
+               return -EINVAL;
+
+       struct clk clk;
+
+       ret = clk_get_by_index(dev, 0, &clk);
+       if (ret)
+               return ret;
+
+       ret = clk_enable(&clk);
+       if (ret) {
+               clk_free(&clk);
+               return ret;
+       }
+
+       /* Setup with 1ms timebase */
+       writel(((clk_get_rate(&clk) / 1000) & GXBB_WDT_CTRL_DIV_MASK) |
+              GXBB_WDT_CTRL_EE_RESET |
+              GXBB_WDT_CTRL_CLK_EN |
+              GXBB_WDT_CTRL_CLKDIV_EN,
+              data->reg_base + GXBB_WDT_CTRL_REG);
+
+       return 0;
+}
+
+static const struct wdt_ops amlogic_wdt_ops = {
+       .start = amlogic_wdt_start,
+       .reset = amlogic_wdt_reset,
+       .stop = amlogic_wdt_stop,
+       .expire_now = amlogic_wdt_expire_now,
+};
+
+static const struct udevice_id amlogic_wdt_ids[] = {
+       { .compatible = "amlogic,meson-gxbb-wdt" },
+       {}
+};
+
+U_BOOT_DRIVER(amlogic_wdt) = {
+       .name = "amlogic_wdt",
+       .id = UCLASS_WDT,
+       .of_match = amlogic_wdt_ids,
+       .priv_auto = sizeof(struct amlogic_wdt_priv),
+       .probe = amlogic_wdt_probe,
+       .ops = &amlogic_wdt_ops,
+       .flags = DM_FLAG_PRE_RELOC,
+};