+Tue Sep 21 17:22:34 1993 K. Richard Pixley (rich@sendai.cygnus.com)
+
+ * breakpoint.c (bpstat_stop_status),
+ infcmd.c (step_1),
+ infrun.c (wait_for_inferior): collapse SHIFT_INST_REGS ifdef and insert macro.
+
+ * m88k-tdep.c: include ieee-float.h. new global target_is_m88110.
+ new const struct ext_format_m88110 for float format.
+ (pic_prologue_code): add braces.
+ (next_insn): remove unused variable buf.
+ (frame_find_saved_regs): remove unused variables next_addr,
+ saved_regs, regnum.
+ (frame_locals_address): remove unused variables frame, ap.
+ (frame_args_address): remove unused variables frame, ap.
+ (push_parameters): add some breaks and a default case.
+
+ * remote-bug.c: remove redundant includes of value.h, target.h,
+ serial.h.
+ (bug_open): corrected typo, sr_multi_scan -> gr_multi_scan.
+ (bug_fetch_register): special case sfip register for m88110.
+ remove flag bit masking of pc registers. This should be handled
+ by the ADDR_BITS_* macros.
+ (bug_store_register): special case sfip register for m88110.
+ Corrected sprint format for extended registers.
+
+ * config/m88k/tm-m88k.h: white space and comment changes. include
+ ieee-float.h. expanded to cope with m88110 extended registers.
+ (R0_REGNUM, XFP_REGNUM, X0_REGNUM): new macros.
+ (SHIFT_INST_REGS): becomes a real macro.
+
Tue Sep 21 17:48:14 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
* breakpoint.c (breakpoint_1): Support bp_call_dummy.
{
*pc = bp_addr;
#if defined (SHIFT_INST_REGS)
- {
- CORE_ADDR pc = read_register (PC_REGNUM);
- CORE_ADDR npc = read_register (NPC_REGNUM);
- if (pc != npc)
- {
- write_register (NNPC_REGNUM, npc);
- write_register (NPC_REGNUM, pc);
- }
- }
+ SHIFT_INST_REGS();
#else /* No SHIFT_INST_REGS. */
write_pc (bp_addr);
#endif /* No SHIFT_INST_REGS. */
#include "symtab.h"
#include "setjmp.h"
#include "value.h"
+#include "ieee-float.h" /* for ext_format & friends */
/* Size of an instruction */
#define BYTES_PER_88K_INSN 4
void frame_find_saved_regs ();
+/* is this target an m88110? Otherwise assume m88100. This has
+ relevance for the ways in which we screw with instruction pointers. */
+int target_is_m88110 = 0;
+
+/* FIXME: this is really just a guess based on m88110 being big
+ endian. */
+const struct ext_format ext_format_m88110 = {
+/* tot sbyte smask expbyte manbyte */
+ 10, 0, 0x80, 0,1, 4,8 /* m88110 */
+};
/* Given a GDB frame, determine the address of the calling function's frame.
This will be used to create a new GDB frame struct, and then
static struct pic_prologue_code pic_prologue_code [] = {
/* FIXME -- until this is translated to hex, we won't match it... */
- 0xffffffff, 0,
+ { 0xffffffff, 0 },
/* or r10,r1,0 (if not saved) */
/* bsr.n LabN */
/* or.u r25,r0,const */
unsigned long *pword1;
CORE_ADDR memaddr;
{
- unsigned long buf[1];
-
*pword1 = read_memory_integer (memaddr, BYTES_PER_88K_INSN);
return memaddr + BYTES_PER_88K_INSN;
}
struct frame_info *fi;
struct frame_saved_regs *fsr;
{
- register CORE_ADDR next_addr;
- register CORE_ADDR *saved_regs;
- register int regnum;
register struct frame_saved_regs *cache_fsr;
extern struct obstack frame_cache_obstack;
CORE_ADDR ip;
frame_locals_address (fi)
struct frame_info *fi;
{
- register FRAME frame;
struct frame_saved_regs fsr;
- CORE_ADDR ap;
if (fi->args_pointer) /* Cached value is likely there. */
return fi->args_pointer;
frame_args_address (fi)
struct frame_info *fi;
{
- register FRAME frame;
struct frame_saved_regs fsr;
- CORE_ADDR ap;
if (fi->args_pointer) /* Cached value is likely there. */
return fi->args_pointer;
write_register (SP_REGNUM, rv_addr); /* push space onto the stack */
write_register (SRA_REGNUM, rv_addr);/* set return value register */
+ break;
}
+ default: break;
}
/* Here we make a pre-pass on the whole parameter list to figure out exactly
#include "defs.h"
#include "inferior.h"
#include "wait.h"
-#include "value.h"
#include <string.h>
#include <ctype.h>
#include <errno.h>
#include "terminal.h"
-#include "target.h"
#include "gdbcore.h"
-#include "serial.h"
#include "gdbcmd.h"
#include "remote-utils.h"
sr_write_cr("rs cr06");
sr_expect("rs cr06");
- switch (sr_multi_scan(cpu_check_strings, 0))
+ switch (gr_multi_scan(cpu_check_strings, 0))
{
case 0: /* this is an m88100 */
target_is_m88110 = 0;
for (i = 0; i < NUM_REGS; ++i)
bug_fetch_register(i);
}
+ else if (target_is_m88110 && regno == SFIP_REGNUM)
+ {
+ /* m88110 has no sfip. */
+ long l = 0;
+ supply_register(regno, (char *) &l);
+ }
else if (regno < XFP_REGNUM)
{
sr_write("rs ", 3);
sr_expect("=");
regval = sr_get_hex_word();
gr_expect_prompt();
-
- /* the following registers contain flag bits in the lower to bit slots.
- Mask them off */
- if (regno == PC_REGNUM /* aka sxip */
- || regno == NPC_REGNUM /* aka snip */
- || regno == SFIP_REGNUM) /* aka sfip */
- regval &= ~0x3;
-
supply_register(regno, (char *) ®val);
}
else
regname = get_reg_name(regno);
- if (regno < XFP_REGNUM)
+ if (target_is_m88110 && regno == SFIP_REGNUM)
+ return;
+ else if (regno < XFP_REGNUM)
sprintf(buffer, "rs %s %08x",
regname,
read_register(regno));
{
unsigned char *value = ®isters[REGISTER_BYTE(regno)];
- sprintf(buffer, "rs %s %1x_%2x%1x_%1x%2x%2x%2x%2x%2x%2x",
+ sprintf(buffer, "rs %s %1x_%02x%1x_%1x%02x%02x%02x%02x%02x%02x;d",
regname,
/* sign */
(value[0] >> 7) & 0xf,
projects / external / binutils.git / commitdiff