drm/i915/gt: Fix rc6 on Ivybridge

The current rc6 threshold is larger than the evaluation interval on
Ivybridge; it never enters rc6. Remove the special casing so it behaves
like the other gen6/gen7, and we see rc6 residencies before we manually
park the system.

Closes: https://gitlab.freedesktop.org/drm/intel/issues/1114
Testcase: igt/i915_pm_rc6_residency/rc6-idle #ivb
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Andi Shyti <andi.shyti@intel.com>
Reviewed-by: Andi Shyti <andi.shyti@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20200203202110.670209-1-chris@chris-wilson.co.uk

diff --git a/drivers/gpu/drm/i915/gt/intel_rc6.c b/drivers/gpu/drm/i915/gt/intel_rc6.c
index 01a99fd..682f598 100644 (file)
--- a/drivers/gpu/drm/i915/gt/intel_rc6.c
+++ b/drivers/gpu/drm/i915/gt/intel_rc6.c
@@ -226,10 +226,7 @@ static void gen6_rc6_enable(struct intel_rc6 *rc6)
 
        set(uncore, GEN6_RC_SLEEP, 0);
        set(uncore, GEN6_RC1e_THRESHOLD, 1000);
-       if (IS_IVYBRIDGE(i915))
-               set(uncore, GEN6_RC6_THRESHOLD, 125000);
-       else
-               set(uncore, GEN6_RC6_THRESHOLD, 50000);
+       set(uncore, GEN6_RC6_THRESHOLD, 50000);
        set(uncore, GEN6_RC6p_THRESHOLD, 150000);
        set(uncore, GEN6_RC6pp_THRESHOLD, 64000); /* unused */