@echo "CONFIG_ONENAND_U_BOOT = y" >> $(obj)include/config.mk
s5pc100_smdkc100_config: unconfig
-# @echo "#define CONFIG_ONENAND_U_BOOT" > $(obj)include/config.h
+ @echo "#define CONFIG_ONENAND_U_BOOT" > $(obj)include/config.h
@$(MKCONFIG) $(@:_config=) arm arm_cortexa8 smdkc100 samsung s5pc100
-# @echo "CONFIG_ONENAND_U_BOOT = y" >> $(obj)include/config.mk
+ @echo "CONFIG_ONENAND_U_BOOT = y" >> $(obj)include/config.mk
#########################################################################
## XScale Systems
struct onenand_chip *this = mtd->priv;
int value;
- this->base = (void *)CONFIG_SYS_ONENAND_BASE;
+// this->base = (void *)CONFIG_SYS_ONENAND_BASE;
+ this->base = (void *) 0xe7100000;
- s3c_onenand_init(mtd);
+// s3c_onenand_init(mtd);
- /* D0 Domain clock gating */
+ /* D0 Domain system 1 clock gating */
+#if 0
value = S5P_CLK_GATE_D00_REG;
- value &= ~(1 << 2);
+ value &= ~(1 << 2); /* CFCON */
value |= (1 << 2);
S5P_CLK_GATE_D00_REG = value;
+#endif
+
+#if 0
+ /* D0 Domain memory clock gating */
+ value = S5P_CLK_GATE_D01_REG;
+ value &= ~(1 << 2); /* CLK_ONENANDC */
+ value |= (1 << 2);
+ S5P_CLK_GATE_D01_REG = value;
+#endif
+
+ /* System Special clock gating */
+ value = S5P_CLK_GATE_SCLK0_REG;
+ value &= ~(1 << 2); /* OneNAND */
+ value |= (1 << 2);
+ S5P_CLK_GATE_SCLK0_REG = value;
value = S5P_CLK_SRC0_REG;
- value &= ~(1 << 24);
- value &= ~(1 << 20);
+ value &= ~(1 << 24); /* MUX_1nand: 0 from HCLKD0 */
+// value |= (1 << 24); /* MUX_1nand: 1 from DIV_D1_BUS */
+ value &= ~(1 << 20); /* MUX_HREF: 0 from FIN_27M */
S5P_CLK_SRC0_REG = value;
- /* SYSCON */
value = S5P_CLK_DIV1_REG;
+// value &= ~(3 << 20); /* DIV_1nand: 1 / (ratio+1) */
+// value |= (0 << 20); /* ratio = 1 */
value &= ~(3 << 16);
value |= (1 << 16);
S5P_CLK_DIV1_REG = value;
- WATCHDOG_CNT_LOW_REG = 0xffff;
- WATCHDOG_CNT_HI_REG = 0xffff;
-
- INT_ERR_MASK0_REG = 0x1fff;
-// INT_PIN_ENABLE0_REG = (1 << 0); /* Enable */
-
MEM_RESET0_REG = ONENAND_MEM_RESET_COLD;
+#if 0
while (!(INT_ERR_STAT0_REG & RST_CMP))
continue;
+#endif
+#if 0
INT_ERR_ACK0_REG |= RST_CMP;
INT_ERR_ACK0_REG = INT_ERR_STAT0_REG;
+ WATCHDOG_CNT_LOW_REG = 0xffff;
+ WATCHDOG_CNT_HI_REG = 0xffff;
+#endif
ACC_CLOCK0_REG = 0x3;
+ INT_ERR_MASK0_REG = 0x03ff;
+ INT_PIN_ENABLE0_REG = (1 << 0); /* Enable */
+
+ value = INT_ERR_MASK0_REG;
+ value &= ~RDY_ACT;
+ INT_ERR_MASK0_REG = value;
+
+// MULTI_PLANE_REG = 0;
+// SYNC_WRITE_REG = 1;
#if 0
/* MEM_CFG0_REG = 0xf0e0; */
MEM_CFG0_REG =
ONENAND_SYS_CFG1_IOBE
;
#else
- MEM_CFG0_REG &= ~ONENAND_SYS_CFG1_SYNC_READ;
+ MEM_CFG0_REG |= ONENAND_SYS_CFG1_BRL_4;
MEM_CFG0_REG |= ONENAND_SYS_CFG1_BL_16;
+ MEM_CFG0_REG |= ONENAND_SYS_CFG1_VHF;
MEM_CFG0_REG |= ONENAND_SYS_CFG1_HF;
+// MEM_CFG0_REG |= ONENAND_SYS_CFG1_WM;
#endif
- s3c_set_width_regs(this);
+// s3c_set_width_regs(this);
}
--- /dev/null
+#
+# Samsung SMDKC100(S5PC100) board OneNAND IPL
+#
+# Copyright (C) 2009 Samsung Electronics
+# Minkyu Kang <mk7.kang@samsung.com>
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+
+include $(TOPDIR)/config.mk
+TEXT_BASE = 0xD0034000
+TEXT_BASE2K = 0xD0034800
+TEXT_BASE4K = 0xD0035000
+
+LDSCRIPT= $(TOPDIR)/onenand_ipl/board/$(BOARDDIR)/u-boot-onenand.lds
+LDFLAGS = -Bstatic -T $(LDSCRIPT) -Ttext $(TEXT_BASE) $(PLATFORM_LDFLAGS)
+AFLAGS += -DCONFIG_ONENAND_IPL -g
+CFLAGS += -DCONFIG_ONENAND_IPL -g
+OBJCFLAGS += --gap-fill=0x00
+
+SOBJS := lowlevel_init.o
+SOBJS += start.o cpu_init.o
+COBJS += onenand_read.o
+COBJS += onenand_boot.o
+
+SRCS := $(addprefix $(obj),$(SOBJS:.o=.S) $(COBJS:.o=.c))
+OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS))
+__OBJS := $(SOBJS) $(COBJS)
+LNDIR := $(OBJTREE)/onenand_ipl/board/$(BOARDDIR)
+
+onenandobj := $(OBJTREE)/onenand_ipl/
+
+ALL = $(onenandobj)onenand-ipl $(onenandobj)onenand-ipl.bin $(onenandobj)onenand-ipl-2k.bin $(onenandobj)onenand-ipl-4k.bin
+
+all: $(obj).depend $(ALL)
+
+$(onenandobj)onenand-ipl-2k.bin: $(onenandobj)onenand-ipl
+ $(OBJCOPY) ${OBJCFLAGS} --pad-to=$(TEXT_BASE2K) -O binary $< $@
+
+$(onenandobj)onenand-ipl-4k.bin: $(onenandobj)onenand-ipl
+ $(OBJCOPY) ${OBJCFLAGS} --pad-to=$(TEXT_BASE4K) -O binary $< $@
+
+$(onenandobj)onenand-ipl.bin: $(onenandobj)onenand-ipl
+ $(OBJCOPY) ${OBJCFLAGS} -O binary $< $@
+
+$(onenandobj)onenand-ipl: $(OBJS)
+ cd $(LNDIR) && $(LD) $(LDFLAGS) $$UNDEF_SYM $(__OBJS) \
+ -Map $@.map -o $@
+
+# create symbolic links from common files
+
+# from cpu directory
+$(obj)start.S:
+ @rm -f $@
+ ln -s $(SRCTREE)/cpu/$(CPU)/start.S $@
+
+$(obj)cpu_init.S:
+ ln -s $(SRCTREE)/cpu/$(CPU)/s5pc100/cpu_init.S $@
+
+$(obj)lowlevel_init.S:
+ ln -sf $(SRCTREE)/board/$(BOARDDIR)/lowlevel_init.S $@
+
+# from onenand_ipl directory
+$(obj)onenand_ipl.h:
+ @rm -f $@
+ ln -s $(SRCTREE)/onenand_ipl/onenand_ipl.h $@
+
+$(obj)onenand_boot.c: $(obj)onenand_ipl.h
+ @rm -f $@
+ ln -s $(SRCTREE)/onenand_ipl/onenand_boot.c $@
+
+$(obj)onenand_read.c: $(obj)onenand_ipl.h
+ @rm -f $@
+ ln -s $(SRCTREE)/onenand_ipl/onenand_read.c $@
+
+#########################################################################
+
+$(obj)%.o: $(obj)%.S
+ $(CC) $(AFLAGS) -c -o $@ $<
+
+$(obj)%.o: $(obj)$.c
+ $(CC) $(CFLAGS) -c -o $@ $<
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+clean:
+ rm onenand_boot.c onenand_read.c
+
+#########################################################################
--- /dev/null
+/*
+ * (C) Copyright 2005-2008 Samsung Electronics
+ * Kyungmin Park <kyungmin.park@samsung.com>
+ *
+ * Derived from X-loader
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
+OUTPUT_ARCH(arm)
+ENTRY(_start)
+SECTIONS
+{
+ . = 0x00000000;
+
+ . = ALIGN(4);
+ .text :
+ {
+ start.o (.text)
+ *(.text)
+ }
+
+ . = ALIGN(4);
+ .rodata : { *(.rodata) }
+
+ . = ALIGN(4);
+ .data : { *(.data) }
+
+ . = ALIGN(4);
+ .got : { *(.got) }
+
+ . = ALIGN(4);
+ __bss_start = .;
+ .bss : { *(.bss) }
+ _end = .;
+}
projects / kernel / u-boot.git / commitdiff