DP_AUX_CH_CTL_SYNC_PULSE_SKL(32);
}
-static uint32_t intel_dp_get_aux_send_ctl(struct intel_dp *intel_dp,
- bool has_aux_irq,
- int send_bytes,
- uint32_t aux_clock_divider,
- bool aksv_write)
-{
- uint32_t val = 0;
-
- if (aksv_write) {
- send_bytes += 5;
- val |= DP_AUX_CH_CTL_AUX_AKSV_SELECT;
- }
-
- return val | intel_dp->get_aux_send_ctl(intel_dp,
- has_aux_irq,
- send_bytes,
- aux_clock_divider);
-}
-
static int
intel_dp_aux_xfer(struct intel_dp *intel_dp,
const uint8_t *send, int send_bytes,
- uint8_t *recv, int recv_size, bool aksv_write)
+ uint8_t *recv, int recv_size,
+ u32 aux_send_ctl_flags)
{
struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp);
struct drm_i915_private *dev_priv =
}
while ((aux_clock_divider = intel_dp->get_aux_clock_divider(intel_dp, clock++))) {
- u32 send_ctl = intel_dp_get_aux_send_ctl(intel_dp,
- has_aux_irq,
- send_bytes,
- aux_clock_divider,
- aksv_write);
+ u32 send_ctl = intel_dp->get_aux_send_ctl(intel_dp,
+ has_aux_irq,
+ send_bytes,
+ aux_clock_divider);
+
+ send_ctl |= aux_send_ctl_flags;
/* Must try at least 3 times according to DP spec */
for (try = 0; try < 5; try++) {
memcpy(txbuf + HEADER_SIZE, msg->buffer, msg->size);
ret = intel_dp_aux_xfer(intel_dp, txbuf, txsize,
- rxbuf, rxsize, false);
+ rxbuf, rxsize, 0);
if (ret > 0) {
msg->reply = rxbuf[0] >> 4;
return -E2BIG;
ret = intel_dp_aux_xfer(intel_dp, txbuf, txsize,
- rxbuf, rxsize, false);
+ rxbuf, rxsize, 0);
if (ret > 0) {
msg->reply = rxbuf[0] >> 4;
/*
u8 *an)
{
struct intel_dp *intel_dp = enc_to_intel_dp(&intel_dig_port->base.base);
- uint8_t txbuf[4], rxbuf[2], reply = 0;
+ uint8_t txbuf[4+5] = {}, rxbuf[2], reply = 0;
ssize_t dpcd_ret;
int ret;
txbuf[3] = DRM_HDCP_KSV_LEN - 1;
ret = intel_dp_aux_xfer(intel_dp, txbuf, sizeof(txbuf),
- rxbuf, sizeof(rxbuf), true);
+ rxbuf, sizeof(rxbuf),
+ DP_AUX_CH_CTL_AUX_AKSV_SELECT);
if (ret < 0) {
DRM_ERROR("Write Aksv over DP/AUX failed (%d)\n", ret);
return ret;