i965/vs: Drop the assertion about dst.reg_offset == 0.

Adding the offset is the right thing to do here, and fixes
glsl-vs-mat-add-1.

diff --git a/src/mesa/drivers/dri/i965/brw_vec4_emit.cpp b/src/mesa/drivers/dri/i965/brw_vec4_emit.cpp
index be08936..a41c58c 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_vec4_emit.cpp
+++ b/src/mesa/drivers/dri/i965/brw_vec4_emit.cpp
@@ -146,7 +146,6 @@ vec4_instruction::get_dst(void)
 
    switch (dst.file) {
    case GRF:
-      assert(dst.reg_offset == 0);
       brw_reg = brw_vec8_grf(dst.reg + dst.reg_offset, 0);
       brw_reg = retype(brw_reg, dst.type);
       brw_reg.dw1.bits.writemask = dst.writemask;