.data = &rx_txlx_data
},
{
- .compatible = "amlogic, hdmirx_txl",
+ .compatible = "amlogic, hdmirx-txl",
.data = &rx_txl_data
},
{
#if 0
else {
if (hdmi_cec_en) {
- if (is_meson_gxtvbb_cpu())
+ if (rx.chip_id == CHIP_ID_GXTVBB)
rx_force_hpd_cfg(0);
else
rx_force_hpd_cfg(1);
clk_rate = clk_get_rate(hdevp->skp_clk);
}
}
- if (is_meson_txlx_cpu() || is_meson_txhd_cpu()) {
+ if ((rx.chip_id == CHIP_ID_TXLX) ||
+ (rx.chip_id == CHIP_ID_TXHD)) {
tmds_clk_fs = clk_get(&pdev->dev, "hdmirx_aud_pll2fs");
if (IS_ERR(tmds_clk_fs))
rx_pr("get tmds_clk_fs err\n");
*
*
*/
-#define RX_VER1 "ver.2018/06/07"
+#define RX_VER1 "ver.2018/06/26"
/*
*
*
CHIP_ID_GXTVBB,
CHIP_ID_TXL,
CHIP_ID_TXLX,
- CHIP_ID_TXHD = CHIP_ID_TXLX,
+ CHIP_ID_TXHD,
};
struct meson_hdmirx_data {
unsigned int data32 = 0;
if (enable) {
- if (is_meson_txlx_cpu()) {
+ if (rx.chip_id == CHIP_ID_TXLX) {
data32 |= 1 << 31; /* DRC_CKS_CHG */
data32 |= 1 << 30; /* DRC_RCV */
data32 |= 0 << 29; /* AUD_TYPE_CHG */
data32 |= 0 << 1; /* PD_FIFO_TH_MAX_PASS */
data32 |= 0 << 0; /* PD_FIFO_TH_MIN_PASS */
data32 |= pdec_ists_en;
- } else if (is_meson_txhd_cpu()) {
+ } else if (rx.chip_id == CHIP_ID_TXHD) {
/* data32 |= 1 << 31; DRC_CKS_CHG */
/* data32 |= 1 << 30; DRC_RCV */
data32 |= 0 << 29; /* AUD_TYPE_CHG */
*/
unsigned int rx_get_scdc_clkrate_sts(void)
{
- if (is_meson_txhd_cpu())
+ if (rx.chip_id == CHIP_ID_TXHD)
return 0;
else
return (hdmirx_rd_dwc(DWC_SCDC_REGS0) >> 17) & 1;
*/
void set_scdc_cfg(int hpdlow, int pwrprovided)
{
- if (is_meson_txhd_cpu())
+ if (rx.chip_id == CHIP_ID_TXHD)
return;
hdmirx_wr_dwc(DWC_SCDC_CONFIG,
data32 |= 0 << 0;
hdmirx_wr_top(TOP_VID_CNTL, data32);
- if (!is_meson_txhd_cpu()) {
+ if (rx.chip_id != CHIP_ID_TXHD) {
data32 = 0;
data32 |= 0 << 20;
data32 |= 0 << 8;
}
hdmirx_wr_dwc(DWC_HDCP_BKSV1, hdcp->bksv[0]);
hdmirx_wr_dwc(DWC_HDCP_BKSV0, hdcp->bksv[1]);
- if (!is_meson_txhd_cpu()) {
+ if (rx.chip_id != CHIP_ID_TXHD) {
hdmirx_wr_bits_dwc(DWC_HDCP_RPT_CTRL,
REPEATER, hdcp->repeat ? 1 : 0);
/* nothing attached downstream */
data32 |= 2 << 0;
wr_reg_hhi(HHI_HDMIRX_AUD_CLK_CNTL, data32);
#endif
- if (is_meson_txlx_cpu() || is_meson_txhd_cpu()) {
+ if ((rx.chip_id == CHIP_ID_TXLX) ||
+ (rx.chip_id == CHIP_ID_TXHD)) {
/* [15] hdmirx_aud_pll4x_en override enable */
/* [14] hdmirx_aud_pll4x_en override value */
/* [6:5] clk_sel for cts_hdmirx_aud_pll_clk: */
int i;
int error = 0;
- if (is_meson_txhd_cpu())
+ if (rx.chip_id == CHIP_ID_TXHD)
return false;
if (force_clk_rate & 0x10)
rx_hdcp_init();
hdmirx_audio_init();
packet_init();
- if (!is_meson_txhd_cpu())
+ if (rx.chip_id != CHIP_ID_TXHD)
hdmirx_20_init();
DWC_init();
hdmirx_irq_hdcp_enable(true);
hdcp22_clk_en(1);
hdmirx_audio_init();
packet_init();
- if (!is_meson_txhd_cpu())
+ if (rx.chip_id != CHIP_ID_TXHD)
hdmirx_20_init();
hdmirx_phy_init();
hdmirx_wr_top(TOP_PORT_SEL, 0x10);
data32 |= (rx_pkt_type_mapping(PKT_TYPE_INFOFRAME_AUD));
data32 |= (rx_pkt_type_mapping(PKT_TYPE_INFOFRAME_VSI));
data32 |= (rx_pkt_type_mapping(PKT_TYPE_INFOFRAME_MPEGSRC));
- if (!is_meson_txhd_cpu()) {
+ if (rx.chip_id != CHIP_ID_TXHD) {
data32 |= (rx_pkt_type_mapping(PKT_TYPE_INFOFRAME_NVBI));
data32 |= (rx_pkt_type_mapping(PKT_TYPE_INFOFRAME_DRM));
data32 |= (rx_pkt_type_mapping(PKT_TYPE_AUD_META));
rx_pr("pdec_ists_en=0x%x\n", pdec_ists_en);
rx_irq_en(1);
} else if (strncmp(input[1], "debugext", 8) == 0) {
- if (is_meson_txlx_cpu() || is_meson_txhd_cpu())
+ if ((rx.chip_id == CHIP_ID_TXLX) ||
+ (rx.chip_id == CHIP_ID_TXHD))
enable |= _BIT(30);/* DRC_RCV*/
else
enable |= _BIT(9);/* DRC_RCV*/
if (strncmp(input[2], "fifo", 4) == 0)
sts = (PD_FIFO_START_PASS|PD_FIFO_OVERFL);
else if (strncmp(input[2], "drm", 3) == 0) {
- if (is_meson_txlx_cpu() || is_meson_txhd_cpu())
+ if ((rx.chip_id == CHIP_ID_TXLX) ||
+ (rx.chip_id == CHIP_ID_TXHD))
sts = _BIT(30);
else
sts = _BIT(9);
if (strncmp(input[2], "fifo", 4) == 0)
enable |= (PD_FIFO_START_PASS|PD_FIFO_OVERFL);
else if (strncmp(input[2], "drm", 3) == 0) {
- if (is_meson_txlx_cpu() || is_meson_txhd_cpu())
+ if ((rx.chip_id == CHIP_ID_TXLX) ||
+ (rx.chip_id == CHIP_ID_TXHD))
enable |= _BIT(30);
else
enable |= _BIT(9);
pkt->ver_st.version = 0;
pkt->ver_st.chgbit = 0;
- if (!is_meson_txhd_cpu()) {
+ if (rx.chip_id != CHIP_ID_TXHD) {
pkt->sbpkt.payload.data[0] =
hdmirx_rd_dwc(DWC_PDEC_VSI_PLAYLOAD0);
pkt->sbpkt.payload.data[1] =
}
/*memset(pkt, 0, sizeof(struct pd_infoframe_s));*/
- if (!is_meson_txhd_cpu()) {
+ if (rx.chip_id != CHIP_ID_TXHD) {
HB = hdmirx_rd_dwc(DWC_PDEC_AMP_HB);
pkt->HB = (HB << 8) | PKT_TYPE_AUD_META;
pkt->PB0 = hdmirx_rd_dwc(DWC_PDEC_AMP_PB0);
}
drmpkt->pkttype = PKT_TYPE_INFOFRAME_DRM;
- if (!is_meson_txhd_cpu()) {
+ if (rx.chip_id != CHIP_ID_TXHD) {
drmpkt->length = (hdmirx_rd_dwc(DWC_PDEC_DRM_HB) >> 8);
drmpkt->version = hdmirx_rd_dwc(DWC_PDEC_DRM_HB);
return;
}
- if (!is_meson_txhd_cpu()) {
+ if (rx.chip_id != CHIP_ID_TXHD) {
/*byte 0 , 1*/
pkt->HB = hdmirx_rd_dwc(DWC_PDEC_NTSCVBI_HB);
pkt->PB0 = hdmirx_rd_dwc(DWC_PDEC_NTSCVBI_PB0);
if (log_level & 0x200)
rx_pr("[irq] FIFO MIN\n");
}
- if (!is_meson_txlx_cpu()) {
+ if (rx.chip_id != CHIP_ID_TXLX) {
if (rx_get_bits(intr_pedc,
DRM_RCV_EN) != 0) {
if (log_level & 0x400)
rx_pr("Hdmirx version1: %s\n", RX_VER1);
rx_pr("Hdmirx version2: %s\n", RX_VER2);
rx_pr("------------------\n");
+ } else if (strncmp(input[0], "port0", 5) == 0) {
+ hdmirx_open_port(TVIN_PORT_HDMI0);
+ rx.open_fg = 1;
+ } else if (strncmp(input[0], "port1", 5) == 0) {
+ hdmirx_open_port(TVIN_PORT_HDMI1);
+ rx.open_fg = 1;
+ } else if (strncmp(input[0], "port2", 5) == 0) {
+ hdmirx_open_port(TVIN_PORT_HDMI2);
+ rx.open_fg = 1;
+ } else if (strncmp(input[0], "port3", 5) == 0) {
+ hdmirx_open_port(TVIN_PORT_HDMI3);
+ rx.open_fg = 1;
}
return 0;
}