arm64: Silence clang warning on mismatched value/register sizes
authorCatalin Marinas <catalin.marinas@arm.com>
Fri, 24 Apr 2020 16:38:05 +0000 (17:38 +0100)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Wed, 29 Apr 2020 14:32:56 +0000 (16:32 +0200)
[ Upstream commit: 27a22fbdeedd6c5c451cf5f830d51782bf50c3a2 ]

Clang reports a warning on the __tlbi(aside1is, 0) macro expansion since
the value size does not match the register size specified in the inline
asm. Construct the ASID value using the __TLBI_VADDR() macro.

Fixes: 222fc0c8503d ("arm64: compat: Workaround Neoverse-N1 #1542419 for compat user-space")
Reported-by: Nathan Chancellor <natechancellor@gmail.com>
Cc: James Morse <james.morse@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: James Morse <james.morse@arm.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
arch/arm64/kernel/sys_compat.c

index c9fb029..3c18c24 100644 (file)
@@ -37,7 +37,7 @@ __do_compat_cache_op(unsigned long start, unsigned long end)
                         * The workaround requires an inner-shareable tlbi.
                         * We pick the reserved-ASID to minimise the impact.
                         */
-                       __tlbi(aside1is, 0);
+                       __tlbi(aside1is, __TLBI_VADDR(0, 0));
                        dsb(ish);
                }